[coreboot-gerrit] Change in coreboot[master]: mb/acer: Add Acer Aspire VN7-572G

[Eugene Myers (Code Review)]

Attention is currently required from:  Felix Singer, Nico Huber, Benjamin Doron, Paul Menzel, Angel Pons.
Eugene Myers has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35523 )

Change subject: mb/acer: Add Acer Aspire VN7-572G
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Patch Set 178:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/35523/comment/ceaebf03_1e1e0320 
PS178, Line 37:
> I'm working on an SMI handler for this board that performs some EC operations (port I/O 0x60-0x6F ra […]

Thanks for the console log. Everything (from the STM setup viewpoint) seems to be properly setup and there were a couple of SMI's taken during the coreboot setup to setup the SMMSTORE, so SMI's seem to be working okay. The payload seemed hang once it was ready to start the O/S. I didn't dig into that code. Do you know if an SMI happened at this point.

You're correct, the STM is not active at this point and so it should not be an issue.

With reference to the SMI handler and resource access, those would need to be added to the BIOS resource list (probably need to create a config item.)