[coreboot-gerrit] Change in coreboot[master]: vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3373

[Srinidhi N Kaushik (Code Review)]

Hello build bot (Jenkins), Furquan Shaikh, Nick Vaccaro, Angel Pons, Tim Wawrzynczak, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/45630

to look at the new patch set (#2).

Change subject: vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3373
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vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3373

Update FSP headers for Tiger Lake platform generated based FSP
version 3373. Previous version was 3333.

Changes include below UPDs:
1. ITbtPcieTunnelingForUsb4
2. SlowSlewRate
3. FastPkgCRampDisable

BUG=b:169759177
BRANCH=none
TEST=build and boot delbin/tglrvp

Signed-off-by: Srinidhi N Kaushik 
Change-Id: I2e28905f8f7241940ea92ac3e83b52ff7948953a
---
M src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h
M src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspsUpd.h
2 files changed, 55 insertions(+), 39 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/45630/2