Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46265 )
Change subject: mb/intel/adlrvp: Add ADL-P ramstage mainboard code ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46265/5/src/mainboard/intel/adlrvp/... File src/mainboard/intel/adlrvp/variants/adlrvp_p/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/46265/5/src/mainboard/intel/adlrvp/... PS5, Line 91: s0ix_enable
So most differentiation is here to have S0ix we first need to ensure C10 is hitting hence need to pu […]
Ah, I see. Thank you!