Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37996 )
Change subject: soc/mediatek/mt8183: do TX tracking for DRAM DVFS feature
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Patch Set 9: Code-Review+2
(3 comments)
Looks good
https://review.coreboot.org/c/coreboot/+/37996/5//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/37996/5//COMMIT_MSG@10
PS5, Line 10:
updated at commit msg
Paul, I guess this is done?
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/Kco...
File src/soc/mediatek/mt8183/Kconfig:
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/Kco...
PS8, Line 22: default y
have revert this unexpect change
Done
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra...
File src/soc/mediatek/mt8183/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra...
PS8, Line 2380: u4value = READ32_BITFIELD(&ch[chn].ao.shu[0].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS0_GATED);
I would try to split these lines
Done
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Gerrit-Project: coreboot
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Gerrit-Change-Number: 37996
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