Hello Rizwan Qureshi,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/35230
to review the following change.
Change subject: src/soc/intel/common/block/cse: Add print_me_fw_version() to cse lib. ......................................................................
src/soc/intel/common/block/cse: Add print_me_fw_version() to cse lib.
print_me_fw_version() - queries and logs ME's FW version.
Change-Id: I68a0338ed655c13a478e5dbcc58fc6a8844a5270 Signed-off-by: Rizwan Qureshi rizwan.qureshi@intel.com Signed-off-by: sridhar sridhar.siricilla@intel.com --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 73 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/35230/1
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c index d85209b..2845759 100644 --- a/src/soc/intel/common/block/cse/cse.c +++ b/src/soc/intel/common/block/cse/cse.c @@ -85,6 +85,9 @@ #define ME_HFS_CWS_NORMAL 5 #define ME_HFS_MODE_NORMAL 0
+#define MKHI_GEN_GROUP_ID 0xff +#define MKHI_GET_FW_VERSION 0x02 + static struct cse_device { uintptr_t sec_bar; } g_cse; @@ -122,7 +125,6 @@ uint8_t result; }__packed;
- /* * Initialize the device with provided temporary BAR. If BAR is 0 use a * default. This is intended for pre-mem usage only where BARs haven't been @@ -774,6 +776,72 @@ return -1; }
+/* + * From reading the documentation, this should work for both WHL and CML + * platforms. Also, calling this function from dump_me_status() does not + * work, as the ME does not respond and the command times out. + */ +void print_me_firmware_version(void *unused) +{ + struct version { + uint16_t minor; + uint16_t major; + uint16_t build; + uint16_t hotfix; + } __packed; + + struct fw_ver_resp { + struct mkhi_hdr hdr; + struct version code; + struct version rec; + struct version fitc; + } __packed; + + union me_hfs hfsts1; + const struct mkhi_hdr fw_ver_msg = { + .group_id = MKHI_GEN_GROUP_ID, + .command = MKHI_GET_FW_VERSION, + }; + struct fw_ver_resp resp; + size_t resp_size = sizeof(resp); + + /* Ignore if UART debugging is disabled */ + if (!CONFIG(CONSOLE_SERIAL)) + return; + + hfsts1.data = me_read_config32(PCI_ME_HFSTS1); + + /* + * Prerequisites: + * 1) HFSTS1 Current Working State is Normal + * 2) HFSTS1 Current Operation Mode is Normal + * 3) It's after DRAM INIT DONE message (taken care of by calling it + * during ramstage + */ + if ((hfsts1.fields.working_state != ME_HFS_CWS_NORMAL) || + (hfsts1.fields.operation_mode != ME_HFS_MODE_NORMAL)) + goto fail; + + heci_reset(); + + if (!heci_send(&fw_ver_msg, sizeof(fw_ver_msg), BIOS_HOST_ADDR, + HECI_MKHI_ADDR)) + goto fail; + + if (!heci_receive(&resp, &resp_size)) + goto fail; + + if (resp.hdr.result) + goto fail; + + printk(BIOS_DEBUG, "ME: Version: %d.%d.%d.%d\n", resp.code.major, + resp.code.minor, resp.code.hotfix, resp.code.build); + return; + +fail: + printk(BIOS_DEBUG, "ME: Version: Unavailable\n"); +} + #if ENV_RAMSTAGE
static void update_sec_bar(struct device *dev) diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h index c0a5fef..f5c2b9e 100644 --- a/src/soc/intel/common/block/include/intelblocks/cse.h +++ b/src/soc/intel/common/block/include/intelblocks/cse.h @@ -89,6 +89,10 @@ */ int send_hmrfpo_get_status_msg(void);
+/* + * Queries and logs ME firmware version + */ +void print_me_firmware_version(void *unused);
#define BIOS_HOST_ADDR 0x00 #define HECI_MKHI_ADDR 0x07