[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block/cpu/car: Enable caching before FSP-T

[Gaggery Tsai (Code Review)]

Hello Patrick Rudolph, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/38252

to look at the new patch set (#2).

Change subject: soc/intel/common/block/cpu/car: Enable caching before FSP-T
......................................................................

soc/intel/common/block/cpu/car: Enable caching before FSP-T

This patch is required for Boot Guard enabled platform. Enable caching
before entering FSP-T.

TEST=Stitch boot guard ACM with signed KM and BPM &&
     Enable FSP-T and boot all the way to the OS &&
     Read MSR 0x13a and esnure boot guard verified boot and
     measured boot are enabled.

Change-Id: Ie1def754f7b0024725638fcea481fd3273ef3d24
Signed-off-by: Gaggery Tsai 
---
M src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
1 file changed, 6 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/38252/2