Gaggery Tsai uploaded patch set #2 to this change.

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soc/intel/common/block/cpu/car: Enable caching before FSP-T

This patch is required for Boot Guard enabled platform. Enable caching
before entering FSP-T.

TEST=Stitch boot guard ACM with signed KM and BPM &&
Enable FSP-T and boot all the way to the OS &&
Read MSR 0x13a and esnure boot guard verified boot and
measured boot are enabled.

Change-Id: Ie1def754f7b0024725638fcea481fd3273ef3d24
Signed-off-by: Gaggery Tsai <>
M src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
1 file changed, 6 insertions(+), 0 deletions(-)

git pull ssh:// refs/changes/52/38252/2

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ie1def754f7b0024725638fcea481fd3273ef3d24
Gerrit-Change-Number: 38252
Gerrit-PatchSet: 2
Gerrit-Owner: Gaggery Tsai <>
Gerrit-Reviewer: Gaggery Tsai <>
Gerrit-Reviewer: Patrick Rudolph <>
Gerrit-Reviewer: build bot (Jenkins) <>
Gerrit-MessageType: newpatchset