Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34484 )
Change subject: mb/google/hatch: Initialize SSD GPIOs in bootblock ......................................................................
Patch Set 4:
(7 comments)
Resolving comments for submission. We decided to submit these GPIOs as they are needed for now and debug further. The 0x5a issue still exists on certain SSDs.
https://review.coreboot.org/c/coreboot/+/34484/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34484/1//COMMIT_MSG@7 PS1, Line 7: GPIOs
Did you identify which of these are really required to fix the 0x5a issue?
Done
https://review.coreboot.org/c/coreboot/+/34484/1//COMMIT_MSG@16 PS1, Line 16: Run faft_bios
I think we should do two things here: […]
Done
https://review.coreboot.org/c/coreboot/+/34484/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34484/3//COMMIT_MSG@10 PS3, Line 10: broken
recovery?
Done
https://review.coreboot.org/c/coreboot/+/34484/3//COMMIT_MSG@11 PS3, Line 11: KBL : platforms
Please reference the commit.
Done
https://review.coreboot.org/c/coreboot/+/34484/3//COMMIT_MSG@16 PS3, Line 16: faft_bios
What is that?
Done
https://review.coreboot.org/c/coreboot/+/34484/1/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/baseboard/gpio.c:
https://review.coreboot.org/c/coreboot/+/34484/1/src/mainboard/google/hatch/... PS1, Line 445: GPP_E4
I pulled the SSD pins over together, so I'm not sure if this one needs to be initialized in bootbloc […]
Done
https://review.coreboot.org/c/coreboot/+/34484/1/src/mainboard/google/hatch/... PS1, Line 447: GPP_E5
No, I am just trying to understand what the root cause of the issue is and why a GPIO needs to be in […]
Done