Hello build bot (Jenkins), Martin Roth, Patrick Georgi, Marshall Dawson, Rob Barnes, Aaron Durbin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45278
to look at the new patch set (#4).
Change subject: WIP: Use SPDs from PSP BIOS table type 0x69 based on GPIO straps ......................................................................
WIP: Use SPDs from PSP BIOS table type 0x69 based on GPIO straps
Use GPIOs mapping defined in APCB GET_SPD_FROM_GPIO to fetch correct SPD block from PSP BIOS table entry type 0x69 (BIOS_SPD_DATA). There is only one APCB now with no SPD data in it. No need for board ID getting method. This will save ROM space consumed by multiple APCB copies in the past.
This is a working example of an implementation tested on Dalboz. It does not require patching with APCB_EDIT_TOOL. All SPDs are assembled in one type 0x69 blob and inserted into PSP BIOS directory.
BUG=b:127505025 TEST=Dalboz with CABLRV20090300 and test CB and boot loader code BRANCH=Zork
Change-Id: I9adf7a016ee481214b47d8adc6d53fd8ce0c9bd4 Signed-off-by: Nikolai Vyssotski nikolai.vyssotski@amd.corp-partner.google.com --- M src/mainboard/google/zork/spd/Makefile.inc M src/soc/amd/picasso/Makefile.inc M util/amdfwtool/amdfwtool.c M util/apcb/apcb_edit.py 4 files changed, 105 insertions(+), 60 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/45278/4