Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35681 )
Change subject: cpu/x86/smm: Add support for long mode ......................................................................
Patch Set 12:
(6 comments)
https://review.coreboot.org/c/coreboot/+/35681/11//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/35681/11//COMMIT_MSG@21 PS11, Line 21: Tested on Lenovo T410 with additional x86_64 patches.
This code does not use smm entry, so I don't think it makes much sense to mention here.
Done
https://review.coreboot.org/c/coreboot/+/35681/5/src/cpu/x86/smm/smmhandler.... File src/cpu/x86/smm/smmhandler.S:
https://review.coreboot.org/c/coreboot/+/35681/5/src/cpu/x86/smm/smmhandler.... PS5, Line 198: MSR registers
it can be accessed, but I don't know what happens if you clear the "LME" Long mode enable-bit when r […]
Done
https://review.coreboot.org/c/coreboot/+/35681/5/src/cpu/x86/smm/smmhandler.... PS5, Line 219: /* Disable paging */ : movl %cr0, %eax : andl $0x7FFFFFFF, %eax : movl %eax, %cr0
yes, just standard long mode disable sequence.
Moved code to src/cpu/x86/64bit/exit32.inc
https://review.coreboot.org/c/coreboot/+/35681/5/src/cpu/x86/smm/smmhandler.... PS5, Line 229: : /* Disable PAE */ : movl %cr4, %eax : andl $(~0x20), %eax : movl %eax, %cr4
yes, just standard long mode disable sequence.
Moved code to src/cpu/x86/64bit/exit32.inc
https://review.coreboot.org/c/coreboot/+/35681/6/src/cpu/x86/smm/smmhandler.... File src/cpu/x86/smm/smmhandler.S:
https://review.coreboot.org/c/coreboot/+/35681/6/src/cpu/x86/smm/smmhandler.... PS6, Line 247: ia32efer_backup
tried that but doesn't compile.
done
https://review.coreboot.org/c/coreboot/+/35681/11/src/cpu/x86/smm/smmhandler... File src/cpu/x86/smm/smmhandler.S:
https://review.coreboot.org/c/coreboot/+/35681/11/src/cpu/x86/smm/smmhandler... PS11, Line 215: #if defined(__x86_64__) : ia32efer_backup: : .long : #endif
You probably want to put this a different section like . […]
Done