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6 comments:
Commit Message:
File src/cpu/x86/smm/smmhandler.S:
Patch Set #5, Line 198: MSR registers
it can be accessed, but I don't know what happens if you clear the "LME" Long mode enable-bit when r […]
Done
Patch Set #5, Line 219:
/* Disable paging */
movl %cr0, %eax
andl $0x7FFFFFFF, %eax
movl %eax, %cr0
yes, just standard long mode disable sequence.
Moved code to src/cpu/x86/64bit/exit32.inc
Patch Set #5, Line 229:
/* Disable PAE */
movl %cr4, %eax
andl $(~0x20), %eax
movl %eax, %cr4
yes, just standard long mode disable sequence.
Moved code to src/cpu/x86/64bit/exit32.inc
File src/cpu/x86/smm/smmhandler.S:
File src/cpu/x86/smm/smmhandler.S:
Patch Set #11, Line 215:
#if defined(__x86_64__)
ia32efer_backup:
.long
#endif
You probably want to put this a different section like . […]
Done
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I8bba4af4688c723fc079ae905dac95f57ea956f8
Gerrit-Change-Number: 35681
Gerrit-PatchSet: 12
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