[coreboot-gerrit] Change in ...coreboot[master]: src/soc/intel/common/block/sgx: Add missing new lines

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/33035 )

Change subject: src/soc/intel/common/block/sgx: Add missing new lines
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src/soc/intel/common/block/sgx: Add missing new lines

Added missing new lines to Debug Output.

Change-Id: I30f208a60661451bc0794c705113e8d19a68b0eb
Signed-off-by: Christian Walter 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33035
Reviewed-by: Philipp Deppenwiese 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/common/block/sgx/sgx.c
1 file changed, 2 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Philipp Deppenwiese: Looks good to me, approved

diff --git a/src/soc/intel/common/block/sgx/sgx.c b/src/soc/intel/common/block/sgx/sgx.c
index 2d4cc53..60714d9 100644
--- a/src/soc/intel/common/block/sgx/sgx.c
+++ b/src/soc/intel/common/block/sgx/sgx.c
@@ -100,8 +100,8 @@
    	return;
    }

-	printk(BIOS_INFO, "SGX: prmrr_base = 0x%llx", prmrr_base.data64);
-	printk(BIOS_INFO, "SGX: prmrr_mask = 0x%llx", prmrr_mask.data64);
+	printk(BIOS_INFO, "SGX: prmrr_base = 0x%llx\n", prmrr_base.data64);
+	printk(BIOS_INFO, "SGX: prmrr_mask = 0x%llx\n", prmrr_mask.data64);

/* Program core PRMRR MSRs.
     * - Set cache writeback mem attrib in PRMRR base MSR