Keith Hui has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38352 )
Change subject: sb/intel/i82371eb: Add support for reconfiguring GPO22/23 ......................................................................
Patch Set 4:
(2 comments)
https://review.coreboot.org/c/coreboot/+/38352/4/src/southbridge/intel/i8237... File src/southbridge/intel/i82371eb/chip.h:
https://review.coreboot.org/c/coreboot/+/38352/4/src/southbridge/intel/i8237... PS4, Line 32: int gpo22:1; : int gpo23:1; : int pad:5;
These seem to be unused
pad is padding to whole bytes.
gpo22 and gpo23 are future provisions to allow controlling asus/p2b-ls SCSI bus termination via nvram options. Option table for that board is a todo, maybe in a big push to Make P2B-LS Great Again...
https://review.coreboot.org/c/coreboot/+/38352/4/src/southbridge/intel/i8237... File src/southbridge/intel/i82371eb/isa.c:
https://review.coreboot.org/c/coreboot/+/38352/4/src/southbridge/intel/i8237... PS4, Line 89: 32
This has been switched to 32 bits, I guess the previous 16-bit write was a bug?
Previously only the low 16 bits were changed so that worked. Now this has to be 32-bit because bit 28 also changed.