2 comments:
File src/southbridge/intel/i82371eb/chip.h:
int gpo22:1;
int gpo23:1;
int pad:5;
These seem to be unused
pad is padding to whole bytes.
gpo22 and gpo23 are future provisions to allow controlling asus/p2b-ls SCSI bus termination via nvram options. Option table for that board is a todo, maybe in a big push to Make P2B-LS Great Again...
File src/southbridge/intel/i82371eb/isa.c:
This has been switched to 32 bits, I guess the previous 16-bit write was a bug?
Previously only the low 16 bits were changed so that worked. Now this has to be 32-bit because bit 28 also changed.
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