Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34992 )
Change subject: soc/intel/common: Make use of clflush in common platform_segment_loaded ......................................................................
Patch Set 2:
(3 comments)
Move to cpu/x86? I don't think it is Intel specific.
https://review.coreboot.org/c/coreboot/+/34992/2/src/soc/intel/common/block/... File src/soc/intel/common/block/cpu/car/car.c:
https://review.coreboot.org/c/coreboot/+/34992/2/src/soc/intel/common/block/... PS2, Line 36: ALIGN_DOWN(size + 4096, 4096) What is this about?
https://review.coreboot.org/c/coreboot/+/34992/2/src/soc/intel/common/block/... PS2, Line 37: 64 you can get cacheline size from cpuid.
https://review.coreboot.org/c/coreboot/+/34992/2/src/soc/intel/common/block/... PS2, Line 38: clflush Check for cflush in cpuid?