[coreboot-gerrit] Change in coreboot[master]: arch/x86: Add postcar_frame_setup_top_of_dram_usage() API

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34805 )

Change subject: arch/x86: Add postcar_frame_setup_top_of_dram_usage() API
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Patch Set 6:

(1 comment)

https://review.coreboot.org/c/coreboot/+/34805/6/src/arch/x86/postcar_loader... 
File src/arch/x86/postcar_loader.c:

https://review.coreboot.org/c/coreboot/+/34805/6/src/arch/x86/postcar_loader... 
PS6, Line 162: 	postcar_frame_add_mtrr(pcf, addr, size, type);
Implementation of postcar_frame_add_mtrr() is capable of splitting the region to multiple MTRRs. Implementation of enable_top_of_dram_cache() is not. The approach proposed here adds new alignment requirements, so you cannot simply change calls from postcar_frame_add_mtrr() to postcar_frame_setup_top_of_dram_usage(), like your followup work seems to propose.

I believe that as we discussed dropping CPU_ADDR_BITS and cpu_phys_address_size() I recommended not to use set_var_mtrr() but to replay the values from the generated frame instead.