Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39970 )
Change subject: mb/pcengines/apu2: do not pass enabled PCIe ClockPM to AGESA ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/c/coreboot/+/39970/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39970/2//COMMIT_MSG@8 PS2, Line 8: : Certain PCIe endpoints cause an exception inside AmdInitMid when PCIe : ClockPM is enabled in AGESA PCIe initialization structures. Disable it : to allow platform to boot with such devices. How can this be reproduced exactly?
How does the exception look like?
https://review.coreboot.org/c/coreboot/+/39970/2/src/mainboard/pcengines/apu... File src/mainboard/pcengines/apu2/OemCustomize.c:
https://review.coreboot.org/c/coreboot/+/39970/2/src/mainboard/pcengines/apu... PS2, Line 38: 0) A comment would help, that coreboot takes care of this?