[coreboot-gerrit] Change in ...coreboot[master]: soc/amd/stoneyridge: Rework SPI base address get/set

[Marshall Dawson (Code Review)]

Hello Richard Spiegel, build bot (Jenkins), Furquan Shaikh, Martin Roth,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/32652

to look at the new patch set (#5).

Change subject: soc/amd/stoneyridge: Rework SPI base address get/set
......................................................................

soc/amd/stoneyridge: Rework SPI base address get/set

A subsequent patch will move the soc//stoneyridge LPC functionality to
a common directory.  Prepare by reworking the SPI BAR configuration
function in southbridge.h.  The SPI BAR is not a typical PCI BAR, and
is at D14F3xA0.

Change-Id: I73ddb4afaf9e67ca0522ecb6085b23c92fedc461
Signed-off-by: Marshall Dawson 
---
M src/soc/amd/stoneyridge/include/soc/southbridge.h
M src/soc/amd/stoneyridge/lpc.c
M src/soc/amd/stoneyridge/southbridge.c
3 files changed, 41 insertions(+), 20 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/32652/5