[coreboot-gerrit] Change in ...coreboot[master]: [WIP] CML: Enable UPDs for PCH SLP_S0 for S0ix entry

[Sumeet R Pawnikar (Code Review)]

Hello Patrick Rudolph, Subrata Banik, Rizwan Qureshi, build bot (Jenkins), Furquan Shaikh, Lakshmi G Prasad,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/32668

to look at the new patch set (#3).

Change subject: [WIP] CML: Enable UPDs for PCH SLP_S0 for S0ix entry
......................................................................

[WIP] CML: Enable UPDs for PCH SLP_S0 for S0ix entry

Enable PCH SLP S0 UPDs for S0ix entry.

BUG=None
BRANCH=None
TEST=Built and tested on Hatch

Change-Id: I57a15746705a726b402431321a45b3257d837faa
Signed-off-by: Sumeet Pawnikar 
---
M src/soc/intel/cannonlake/fsp_params.c
1 file changed, 3 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/32668/3