build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39169 )
Change subject: soc/intel/tigerlake: Update SerialIoUart settings for Tiger Lake
......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39169/1/src/soc/intel/tigerlake/fsp...
File src/soc/intel/tigerlake/fsp_params_tgl.c:
https://review.coreboot.org/c/coreboot/+/39169/1/src/soc/intel/tigerlake/fsp...
PS1, Line 124: ASSERT(CONFIG_UART_FOR_CONSOLE < ARRAY_SIZE(params->SerialIoUartAutoFlow));
Comparisons should place the constant on the right side of the test
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I5ff2c63857a868ca4ed72c6d93bf518e085b8879
Gerrit-Change-Number: 39169
Gerrit-PatchSet: 1
Gerrit-Owner: Srinidhi N Kaushik
srinidhi.n.kaushik@intel.com
Gerrit-Reviewer: Patrick Rudolph
siro@das-labor.org
Gerrit-Reviewer: Srinidhi N Kaushik
srinidhi.n.kaushik@intel.com
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Gerrit-Comment-Date: Sat, 29 Feb 2020 08:43:58 +0000
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