Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35523 )
Change subject: mb/acer: Add Acer Aspire VN7-572G ......................................................................
Patch Set 20:
(6 comments)
https://review.coreboot.org/c/coreboot/+/35523/20//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/35523/20//COMMIT_MSG@9 PS20, Line 9: Adds Add
https://review.coreboot.org/c/coreboot/+/35523/20//COMMIT_MSG@12 PS20, Line 12: -Some amount of booting Please be more specific.
https://review.coreboot.org/c/coreboot/+/35523/20//COMMIT_MSG@15 PS20, Line 15: Assumed working: Untested?
https://review.coreboot.org/c/coreboot/+/35523/20//COMMIT_MSG@19 PS20, Line 19: Tianocore TianoCore
https://review.coreboot.org/c/coreboot/+/35523/20//COMMIT_MSG@11 PS20, Line 11: Works: : -Some amount of booting : -2/4 RAM slots : : Assumed working: : -Audio : : Does not work: : -Loading payload (tried Tianocore (at least no logging is occurring) : and SeaBIOS master (halts after unexpected APIC exception) : -Display (tried FSP GOP + VBT as well as OptionROM) : -Remaining RAM slots (need other SPD addresses. : These could be 0x51 and 0x53) : -Some PCIe stuff (some lspci devices aren't found and are disabled) : -TPM ("tis_probe: No TPM device found" but : "_SB.PCI0.LPCB.TPM: LPC TPM PNP: 0c31.0")? : : Unknown: : -EC stuff (assumed from gpe0_{sts,en}[x]: 00000000) : -Microcode update (FIT states a size of 0, update is skipped) Please add a space after the “bullet point”.
https://review.coreboot.org/c/coreboot/+/35523/20//COMMIT_MSG@32 PS20, Line 32: One blank line is enough.