[coreboot-gerrit] Change in coreboot[master]: spd/lp4x: Set manufacturer part name to blank (0x20)

8 Jun 2020

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42023 )
Change subject: spd/lp4x: Set manufacturer part name to blank (0x20)
......................................................................
spd/lp4x: Set manufacturer part name to blank (0x20)
As per JEDEC spec, manufacturer part name should be set to
blank (0x20). This change updates gen_spd.go to set bytes 329-348 as
0x20 and regenerates SPDs for TGL and JSL.
Change-Id: I6af18d89afd7264cec7e54b38e95df83d55aa058
Signed-off-by: Furquan Shaikh furquan@google.com
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42023
Reviewed-by: Karthik Ramasubramanian kramasub@google.com
Tested-by: build bot (Jenkins) no-reply@coreboot.org
---
M src/soc/intel/jasperlake/spd/lp4x/spd-1.hex
M src/soc/intel/jasperlake/spd/lp4x/spd-2.hex
M src/soc/intel/jasperlake/spd/lp4x/spd-3.hex
M src/soc/intel/jasperlake/spd/lp4x/spd-4.hex
M src/soc/intel/jasperlake/spd/lp4x/spd-5.hex
M src/soc/intel/jasperlake/spd/lp4x/spd-6.hex
M src/soc/intel/jasperlake/spd/lp4x/spd-7.hex
M src/soc/intel/tigerlake/spd/lp4x/spd-1.hex
M src/soc/intel/tigerlake/spd/lp4x/spd-2.hex
M src/soc/intel/tigerlake/spd/lp4x/spd-3.hex
M src/soc/intel/tigerlake/spd/lp4x/spd-4.hex
M src/soc/intel/tigerlake/spd/lp4x/spd-5.hex
M util/spd_tools/intel/lp4x/gen_spd.go
13 files changed, 39 insertions(+), 24 deletions(-)
Approvals:
  build bot (Jenkins): Verified
  Karthik Ramasubramanian: Looks good to me, approved

diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-1.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-1.hex
index 06a06e1..50f50e2 100644
--- a/src/soc/intel/jasperlake/spd/lp4x/spd-1.hex
+++ b/src/soc/intel/jasperlake/spd/lp4x/spd-1.hex
@@ -18,8 +18,8 @@
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20
+20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-2.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-2.hex
index ae9fe3c..866b466 100644
--- a/src/soc/intel/jasperlake/spd/lp4x/spd-2.hex
+++ b/src/soc/intel/jasperlake/spd/lp4x/spd-2.hex
@@ -18,8 +18,8 @@
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20
+20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-3.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-3.hex
index 7da85a5..6db2d80 100644
--- a/src/soc/intel/jasperlake/spd/lp4x/spd-3.hex
+++ b/src/soc/intel/jasperlake/spd/lp4x/spd-3.hex
@@ -18,8 +18,8 @@
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20
+20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-4.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-4.hex
index 3f3f21c..c4180b6 100644
--- a/src/soc/intel/jasperlake/spd/lp4x/spd-4.hex
+++ b/src/soc/intel/jasperlake/spd/lp4x/spd-4.hex
@@ -18,8 +18,8 @@
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20
+20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-5.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-5.hex
index 8f5bd4e..77230e7 100644
--- a/src/soc/intel/jasperlake/spd/lp4x/spd-5.hex
+++ b/src/soc/intel/jasperlake/spd/lp4x/spd-5.hex
@@ -18,8 +18,8 @@
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20
+20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-6.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-6.hex
index f025cbd..8da34f1 100644
--- a/src/soc/intel/jasperlake/spd/lp4x/spd-6.hex
+++ b/src/soc/intel/jasperlake/spd/lp4x/spd-6.hex
@@ -18,8 +18,8 @@
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20
+20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-7.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-7.hex
index 69d75bc..2fe6757 100644
--- a/src/soc/intel/jasperlake/spd/lp4x/spd-7.hex
+++ b/src/soc/intel/jasperlake/spd/lp4x/spd-7.hex
@@ -18,8 +18,8 @@
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20
+20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/soc/intel/tigerlake/spd/lp4x/spd-1.hex b/src/soc/intel/tigerlake/spd/lp4x/spd-1.hex
index 55d327a..3fc7505 100644
--- a/src/soc/intel/tigerlake/spd/lp4x/spd-1.hex
+++ b/src/soc/intel/tigerlake/spd/lp4x/spd-1.hex
@@ -18,8 +18,8 @@
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20
+20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/soc/intel/tigerlake/spd/lp4x/spd-2.hex b/src/soc/intel/tigerlake/spd/lp4x/spd-2.hex
index 1558f50..7995d4c 100644
--- a/src/soc/intel/tigerlake/spd/lp4x/spd-2.hex
+++ b/src/soc/intel/tigerlake/spd/lp4x/spd-2.hex
@@ -18,8 +18,8 @@
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20
+20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/soc/intel/tigerlake/spd/lp4x/spd-3.hex b/src/soc/intel/tigerlake/spd/lp4x/spd-3.hex
index c4fd994..d4cf7ef 100644
--- a/src/soc/intel/tigerlake/spd/lp4x/spd-3.hex
+++ b/src/soc/intel/tigerlake/spd/lp4x/spd-3.hex
@@ -18,8 +18,8 @@
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20
+20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/soc/intel/tigerlake/spd/lp4x/spd-4.hex b/src/soc/intel/tigerlake/spd/lp4x/spd-4.hex
index 4988cb4..c4e5b50 100644
--- a/src/soc/intel/tigerlake/spd/lp4x/spd-4.hex
+++ b/src/soc/intel/tigerlake/spd/lp4x/spd-4.hex
@@ -18,8 +18,8 @@
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20
+20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/soc/intel/tigerlake/spd/lp4x/spd-5.hex b/src/soc/intel/tigerlake/spd/lp4x/spd-5.hex
index 9f5bb03..e31337d 100644
--- a/src/soc/intel/tigerlake/spd/lp4x/spd-5.hex
+++ b/src/soc/intel/tigerlake/spd/lp4x/spd-5.hex
@@ -18,8 +18,8 @@
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20
+20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/util/spd_tools/intel/lp4x/gen_spd.go b/util/spd_tools/intel/lp4x/gen_spd.go
index acdc265..2465815 100644
--- a/util/spd_tools/intel/lp4x/gen_spd.go
+++ b/util/spd_tools/intel/lp4x/gen_spd.go
@@ -494,6 +494,8 @@
    SPDIndexTAAMinFineOffset = 123
    SPDIndexTCKMaxFineOffset = 124
    SPDIndexTCKMinFineOffset = 125
+	SPDIndexManufacturerPartNumberStartByte = 329
+	SPDIndexManufacturerPartNumberEndByte = 348
/* SPD Byte Value */
@@ -549,6 +551,9 @@
/* Write Latency Set A and Read Latency DBI-RD disabled. */
    SPDValueReadWriteLatency = 0x00
+
+	/* As per JEDEC spec, unused digits of manufacturer part number are left as blank. */
+	SPDValueManufacturerPartNumberBlank = 0x20
 )
var SPDAttribTable = map[int]SPDAttribTableEntry {
@@ -609,9 +614,19 @@
    return ioutil.WriteFile(filepath.Join(SPDDirName, SPDManifestFileName), []byte(s), 0644)
 }
+func isManufacturerPartNumberByte(index int) bool {
+	if index >= SPDIndexManufacturerPartNumberStartByte && index <= SPDIndexManufacturerPartNumberEndByte {
+		return true
+	}
+	return false
+}
+
 func getSPDByte(index int, memAttribs *memAttributes) byte {
    e, ok := SPDAttribTable[index]
    if ok == false {
+		if isManufacturerPartNumberByte(index) {
+			return SPDValueManufacturerPartNumberBlank
+		}
    	return 0x00
    }
-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I6af18d89afd7264cec7e54b38e95df83d55aa058
Gerrit-Change-Number: 42023
Gerrit-PatchSet: 11
Gerrit-Owner: Furquan Shaikh furquan@google.com
Gerrit-Reviewer: Karthik Ramasubramanian kramasub@google.com
Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
Gerrit-CC: Nick Vaccaro nvaccaro@google.com
Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net
Gerrit-MessageType: merged



    

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[coreboot-gerrit] Change in coreboot[master]: spd/lp4x: Set manufacturer part name to blank (0x20)