Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42023 )
Change subject: spd/lp4x: Set manufacturer part name to blank (0x20) ......................................................................
spd/lp4x: Set manufacturer part name to blank (0x20)
As per JEDEC spec, manufacturer part name should be set to blank(0x20). This change updates gen_spd.go to set bytes 329-348 as 0x20 and regenerates SPDs for TGL and JSL.
Change-Id: I6af18d89afd7264cec7e54b38e95df83d55aa058 Signed-off-by: Furquan Shaikh furquan@google.com --- M src/soc/intel/jasperlake/spd/lp4x/spd-1.hex M src/soc/intel/jasperlake/spd/lp4x/spd-10.hex M src/soc/intel/jasperlake/spd/lp4x/spd-2.hex M src/soc/intel/jasperlake/spd/lp4x/spd-3.hex M src/soc/intel/jasperlake/spd/lp4x/spd-4.hex M src/soc/intel/jasperlake/spd/lp4x/spd-5.hex M src/soc/intel/jasperlake/spd/lp4x/spd-6.hex M src/soc/intel/jasperlake/spd/lp4x/spd-7.hex M src/soc/intel/jasperlake/spd/lp4x/spd-8.hex M src/soc/intel/jasperlake/spd/lp4x/spd-9.hex M src/soc/intel/tigerlake/spd/lp4x/spd-1.hex M src/soc/intel/tigerlake/spd/lp4x/spd-2.hex M src/soc/intel/tigerlake/spd/lp4x/spd-3.hex M src/soc/intel/tigerlake/spd/lp4x/spd-4.hex M src/soc/intel/tigerlake/spd/lp4x/spd-5.hex M src/soc/intel/tigerlake/spd/lp4x/spd-6.hex M src/soc/intel/tigerlake/spd/lp4x/spd-7.hex M src/soc/intel/tigerlake/spd/lp4x/spd-8.hex M util/spd_tools/intel/lp4x/gen_spd.go 19 files changed, 51 insertions(+), 36 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/42023/1
diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-1.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-1.hex index 8f5bd4e..77230e7 100644 --- a/src/soc/intel/jasperlake/spd/lp4x/spd-1.hex +++ b/src/soc/intel/jasperlake/spd/lp4x/spd-1.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-10.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-10.hex index bbb9eea..1fe256a 100644 --- a/src/soc/intel/jasperlake/spd/lp4x/spd-10.hex +++ b/src/soc/intel/jasperlake/spd/lp4x/spd-10.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-2.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-2.hex index 60fe2ab..114363a 100644 --- a/src/soc/intel/jasperlake/spd/lp4x/spd-2.hex +++ b/src/soc/intel/jasperlake/spd/lp4x/spd-2.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-3.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-3.hex index 06a06e1..50f50e2 100644 --- a/src/soc/intel/jasperlake/spd/lp4x/spd-3.hex +++ b/src/soc/intel/jasperlake/spd/lp4x/spd-3.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-4.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-4.hex index 7da85a5..6db2d80 100644 --- a/src/soc/intel/jasperlake/spd/lp4x/spd-4.hex +++ b/src/soc/intel/jasperlake/spd/lp4x/spd-4.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-5.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-5.hex index f025cbd..8da34f1 100644 --- a/src/soc/intel/jasperlake/spd/lp4x/spd-5.hex +++ b/src/soc/intel/jasperlake/spd/lp4x/spd-5.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-6.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-6.hex index 211c8ae..3277b0b 100644 --- a/src/soc/intel/jasperlake/spd/lp4x/spd-6.hex +++ b/src/soc/intel/jasperlake/spd/lp4x/spd-6.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-7.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-7.hex index 6a929f3..2a83870 100644 --- a/src/soc/intel/jasperlake/spd/lp4x/spd-7.hex +++ b/src/soc/intel/jasperlake/spd/lp4x/spd-7.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-8.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-8.hex index c26874c..e4821ba 100644 --- a/src/soc/intel/jasperlake/spd/lp4x/spd-8.hex +++ b/src/soc/intel/jasperlake/spd/lp4x/spd-8.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-9.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-9.hex index dcb44f0..966e666 100644 --- a/src/soc/intel/jasperlake/spd/lp4x/spd-9.hex +++ b/src/soc/intel/jasperlake/spd/lp4x/spd-9.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/tigerlake/spd/lp4x/spd-1.hex b/src/soc/intel/tigerlake/spd/lp4x/spd-1.hex index 55d327a..3fc7505 100644 --- a/src/soc/intel/tigerlake/spd/lp4x/spd-1.hex +++ b/src/soc/intel/tigerlake/spd/lp4x/spd-1.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/tigerlake/spd/lp4x/spd-2.hex b/src/soc/intel/tigerlake/spd/lp4x/spd-2.hex index 1558f50..7995d4c 100644 --- a/src/soc/intel/tigerlake/spd/lp4x/spd-2.hex +++ b/src/soc/intel/tigerlake/spd/lp4x/spd-2.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/tigerlake/spd/lp4x/spd-3.hex b/src/soc/intel/tigerlake/spd/lp4x/spd-3.hex index c4fd994..d4cf7ef 100644 --- a/src/soc/intel/tigerlake/spd/lp4x/spd-3.hex +++ b/src/soc/intel/tigerlake/spd/lp4x/spd-3.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/tigerlake/spd/lp4x/spd-4.hex b/src/soc/intel/tigerlake/spd/lp4x/spd-4.hex index 4988cb4..c4e5b50 100644 --- a/src/soc/intel/tigerlake/spd/lp4x/spd-4.hex +++ b/src/soc/intel/tigerlake/spd/lp4x/spd-4.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/tigerlake/spd/lp4x/spd-5.hex b/src/soc/intel/tigerlake/spd/lp4x/spd-5.hex index cf6bf52..5fe7762 100644 --- a/src/soc/intel/tigerlake/spd/lp4x/spd-5.hex +++ b/src/soc/intel/tigerlake/spd/lp4x/spd-5.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/tigerlake/spd/lp4x/spd-6.hex b/src/soc/intel/tigerlake/spd/lp4x/spd-6.hex index 0627bb3..985e5fd 100644 --- a/src/soc/intel/tigerlake/spd/lp4x/spd-6.hex +++ b/src/soc/intel/tigerlake/spd/lp4x/spd-6.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/tigerlake/spd/lp4x/spd-7.hex b/src/soc/intel/tigerlake/spd/lp4x/spd-7.hex index 9c56627..f330d4b 100644 --- a/src/soc/intel/tigerlake/spd/lp4x/spd-7.hex +++ b/src/soc/intel/tigerlake/spd/lp4x/spd-7.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/tigerlake/spd/lp4x/spd-8.hex b/src/soc/intel/tigerlake/spd/lp4x/spd-8.hex index f9de66b..19cce27 100644 --- a/src/soc/intel/tigerlake/spd/lp4x/spd-8.hex +++ b/src/soc/intel/tigerlake/spd/lp4x/spd-8.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/util/spd_tools/intel/lp4x/gen_spd.go b/util/spd_tools/intel/lp4x/gen_spd.go index acdc265..2465815 100644 --- a/util/spd_tools/intel/lp4x/gen_spd.go +++ b/util/spd_tools/intel/lp4x/gen_spd.go @@ -494,6 +494,8 @@ SPDIndexTAAMinFineOffset = 123 SPDIndexTCKMaxFineOffset = 124 SPDIndexTCKMinFineOffset = 125 + SPDIndexManufacturerPartNumberStartByte = 329 + SPDIndexManufacturerPartNumberEndByte = 348
/* SPD Byte Value */
@@ -549,6 +551,9 @@
/* Write Latency Set A and Read Latency DBI-RD disabled. */ SPDValueReadWriteLatency = 0x00 + + /* As per JEDEC spec, unused digits of manufacturer part number are left as blank. */ + SPDValueManufacturerPartNumberBlank = 0x20 )
var SPDAttribTable = map[int]SPDAttribTableEntry { @@ -609,9 +614,19 @@ return ioutil.WriteFile(filepath.Join(SPDDirName, SPDManifestFileName), []byte(s), 0644) }
+func isManufacturerPartNumberByte(index int) bool { + if index >= SPDIndexManufacturerPartNumberStartByte && index <= SPDIndexManufacturerPartNumberEndByte { + return true + } + return false +} + func getSPDByte(index int, memAttribs *memAttributes) byte { e, ok := SPDAttribTable[index] if ok == false { + if isManufacturerPartNumberByte(index) { + return SPDValueManufacturerPartNumberBlank + } return 0x00 }
Hello build bot (Jenkins), Patrick Rudolph, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42023
to look at the new patch set (#3).
Change subject: spd/lp4x: Set manufacturer part name to blank (0x20) ......................................................................
spd/lp4x: Set manufacturer part name to blank (0x20)
As per JEDEC spec, manufacturer part name should be set to blank(0x20). This change updates gen_spd.go to set bytes 329-348 as 0x20 and regenerates SPDs for TGL and JSL.
Change-Id: I6af18d89afd7264cec7e54b38e95df83d55aa058 Signed-off-by: Furquan Shaikh furquan@google.com --- M src/soc/intel/jasperlake/spd/lp4x/spd-1.hex M src/soc/intel/jasperlake/spd/lp4x/spd-2.hex M src/soc/intel/jasperlake/spd/lp4x/spd-3.hex M src/soc/intel/jasperlake/spd/lp4x/spd-4.hex M src/soc/intel/jasperlake/spd/lp4x/spd-5.hex M src/soc/intel/jasperlake/spd/lp4x/spd-6.hex M src/soc/intel/jasperlake/spd/lp4x/spd-7.hex M src/soc/intel/tigerlake/spd/lp4x/spd-1.hex M src/soc/intel/tigerlake/spd/lp4x/spd-2.hex M src/soc/intel/tigerlake/spd/lp4x/spd-3.hex M src/soc/intel/tigerlake/spd/lp4x/spd-4.hex M src/soc/intel/tigerlake/spd/lp4x/spd-5.hex M util/spd_tools/intel/lp4x/gen_spd.go 13 files changed, 39 insertions(+), 24 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/42023/3
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42023 )
Change subject: spd/lp4x: Set manufacturer part name to blank (0x20) ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42023/5//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42023/5//COMMIT_MSG@10 PS5, Line 10: blank(0x20). This change updates gen_spd.go to set bytes 329-348 as Please add a space before the (.
Hello build bot (Jenkins), Patrick Rudolph, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42023
to look at the new patch set (#6).
Change subject: spd/lp4x: Set manufacturer part name to blank (0x20) ......................................................................
spd/lp4x: Set manufacturer part name to blank (0x20)
As per JEDEC spec, manufacturer part name should be set to blank(0x20). This change updates gen_spd.go to set bytes 329-348 as 0x20 and regenerates SPDs for TGL and JSL.
Change-Id: I6af18d89afd7264cec7e54b38e95df83d55aa058 Signed-off-by: Furquan Shaikh furquan@google.com --- M src/soc/intel/jasperlake/spd/lp4x/spd-1.hex M src/soc/intel/jasperlake/spd/lp4x/spd-2.hex M src/soc/intel/jasperlake/spd/lp4x/spd-3.hex M src/soc/intel/jasperlake/spd/lp4x/spd-4.hex M src/soc/intel/jasperlake/spd/lp4x/spd-5.hex M src/soc/intel/jasperlake/spd/lp4x/spd-6.hex M src/soc/intel/jasperlake/spd/lp4x/spd-7.hex M src/soc/intel/tigerlake/spd/lp4x/spd-1.hex M src/soc/intel/tigerlake/spd/lp4x/spd-2.hex M src/soc/intel/tigerlake/spd/lp4x/spd-3.hex M src/soc/intel/tigerlake/spd/lp4x/spd-4.hex M src/soc/intel/tigerlake/spd/lp4x/spd-5.hex M util/spd_tools/intel/lp4x/gen_spd.go 13 files changed, 39 insertions(+), 24 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/42023/6
Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42023 )
Change subject: spd/lp4x: Set manufacturer part name to blank (0x20) ......................................................................
Patch Set 7:
Does the MRC care about the manufacturer part name field?
Hello build bot (Jenkins), Patrick Rudolph, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42023
to look at the new patch set (#10).
Change subject: spd/lp4x: Set manufacturer part name to blank (0x20) ......................................................................
spd/lp4x: Set manufacturer part name to blank (0x20)
As per JEDEC spec, manufacturer part name should be set to blank (0x20). This change updates gen_spd.go to set bytes 329-348 as 0x20 and regenerates SPDs for TGL and JSL.
Change-Id: I6af18d89afd7264cec7e54b38e95df83d55aa058 Signed-off-by: Furquan Shaikh furquan@google.com --- M src/soc/intel/jasperlake/spd/lp4x/spd-1.hex M src/soc/intel/jasperlake/spd/lp4x/spd-2.hex M src/soc/intel/jasperlake/spd/lp4x/spd-3.hex M src/soc/intel/jasperlake/spd/lp4x/spd-4.hex M src/soc/intel/jasperlake/spd/lp4x/spd-5.hex M src/soc/intel/jasperlake/spd/lp4x/spd-6.hex M src/soc/intel/jasperlake/spd/lp4x/spd-7.hex M src/soc/intel/tigerlake/spd/lp4x/spd-1.hex M src/soc/intel/tigerlake/spd/lp4x/spd-2.hex M src/soc/intel/tigerlake/spd/lp4x/spd-3.hex M src/soc/intel/tigerlake/spd/lp4x/spd-4.hex M src/soc/intel/tigerlake/spd/lp4x/spd-5.hex M util/spd_tools/intel/lp4x/gen_spd.go 13 files changed, 39 insertions(+), 24 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/42023/10
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42023 )
Change subject: spd/lp4x: Set manufacturer part name to blank (0x20) ......................................................................
Patch Set 10: Code-Review+2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42023 )
Change subject: spd/lp4x: Set manufacturer part name to blank (0x20) ......................................................................
Patch Set 10:
Patch Set 7:
Does the MRC care about the manufacturer part name field?
No, but according to the JEDEC spec, manufacturer part name bytes should be set as 0x20.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42023 )
Change subject: spd/lp4x: Set manufacturer part name to blank (0x20) ......................................................................
Patch Set 10:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42023/5//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42023/5//COMMIT_MSG@10 PS5, Line 10: blank(0x20). This change updates gen_spd.go to set bytes 329-348 as
Please add a space before the (.
Done
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42023 )
Change subject: spd/lp4x: Set manufacturer part name to blank (0x20) ......................................................................
spd/lp4x: Set manufacturer part name to blank (0x20)
As per JEDEC spec, manufacturer part name should be set to blank (0x20). This change updates gen_spd.go to set bytes 329-348 as 0x20 and regenerates SPDs for TGL and JSL.
Change-Id: I6af18d89afd7264cec7e54b38e95df83d55aa058 Signed-off-by: Furquan Shaikh furquan@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/42023 Reviewed-by: Karthik Ramasubramanian kramasub@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/jasperlake/spd/lp4x/spd-1.hex M src/soc/intel/jasperlake/spd/lp4x/spd-2.hex M src/soc/intel/jasperlake/spd/lp4x/spd-3.hex M src/soc/intel/jasperlake/spd/lp4x/spd-4.hex M src/soc/intel/jasperlake/spd/lp4x/spd-5.hex M src/soc/intel/jasperlake/spd/lp4x/spd-6.hex M src/soc/intel/jasperlake/spd/lp4x/spd-7.hex M src/soc/intel/tigerlake/spd/lp4x/spd-1.hex M src/soc/intel/tigerlake/spd/lp4x/spd-2.hex M src/soc/intel/tigerlake/spd/lp4x/spd-3.hex M src/soc/intel/tigerlake/spd/lp4x/spd-4.hex M src/soc/intel/tigerlake/spd/lp4x/spd-5.hex M util/spd_tools/intel/lp4x/gen_spd.go 13 files changed, 39 insertions(+), 24 deletions(-)
Approvals: build bot (Jenkins): Verified Karthik Ramasubramanian: Looks good to me, approved
diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-1.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-1.hex index 06a06e1..50f50e2 100644 --- a/src/soc/intel/jasperlake/spd/lp4x/spd-1.hex +++ b/src/soc/intel/jasperlake/spd/lp4x/spd-1.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-2.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-2.hex index ae9fe3c..866b466 100644 --- a/src/soc/intel/jasperlake/spd/lp4x/spd-2.hex +++ b/src/soc/intel/jasperlake/spd/lp4x/spd-2.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-3.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-3.hex index 7da85a5..6db2d80 100644 --- a/src/soc/intel/jasperlake/spd/lp4x/spd-3.hex +++ b/src/soc/intel/jasperlake/spd/lp4x/spd-3.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-4.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-4.hex index 3f3f21c..c4180b6 100644 --- a/src/soc/intel/jasperlake/spd/lp4x/spd-4.hex +++ b/src/soc/intel/jasperlake/spd/lp4x/spd-4.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-5.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-5.hex index 8f5bd4e..77230e7 100644 --- a/src/soc/intel/jasperlake/spd/lp4x/spd-5.hex +++ b/src/soc/intel/jasperlake/spd/lp4x/spd-5.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-6.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-6.hex index f025cbd..8da34f1 100644 --- a/src/soc/intel/jasperlake/spd/lp4x/spd-6.hex +++ b/src/soc/intel/jasperlake/spd/lp4x/spd-6.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/jasperlake/spd/lp4x/spd-7.hex b/src/soc/intel/jasperlake/spd/lp4x/spd-7.hex index 69d75bc..2fe6757 100644 --- a/src/soc/intel/jasperlake/spd/lp4x/spd-7.hex +++ b/src/soc/intel/jasperlake/spd/lp4x/spd-7.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/tigerlake/spd/lp4x/spd-1.hex b/src/soc/intel/tigerlake/spd/lp4x/spd-1.hex index 55d327a..3fc7505 100644 --- a/src/soc/intel/tigerlake/spd/lp4x/spd-1.hex +++ b/src/soc/intel/tigerlake/spd/lp4x/spd-1.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/tigerlake/spd/lp4x/spd-2.hex b/src/soc/intel/tigerlake/spd/lp4x/spd-2.hex index 1558f50..7995d4c 100644 --- a/src/soc/intel/tigerlake/spd/lp4x/spd-2.hex +++ b/src/soc/intel/tigerlake/spd/lp4x/spd-2.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/tigerlake/spd/lp4x/spd-3.hex b/src/soc/intel/tigerlake/spd/lp4x/spd-3.hex index c4fd994..d4cf7ef 100644 --- a/src/soc/intel/tigerlake/spd/lp4x/spd-3.hex +++ b/src/soc/intel/tigerlake/spd/lp4x/spd-3.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/tigerlake/spd/lp4x/spd-4.hex b/src/soc/intel/tigerlake/spd/lp4x/spd-4.hex index 4988cb4..c4e5b50 100644 --- a/src/soc/intel/tigerlake/spd/lp4x/spd-4.hex +++ b/src/soc/intel/tigerlake/spd/lp4x/spd-4.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/tigerlake/spd/lp4x/spd-5.hex b/src/soc/intel/tigerlake/spd/lp4x/spd-5.hex index 9f5bb03..e31337d 100644 --- a/src/soc/intel/tigerlake/spd/lp4x/spd-5.hex +++ b/src/soc/intel/tigerlake/spd/lp4x/spd-5.hex @@ -18,8 +18,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/util/spd_tools/intel/lp4x/gen_spd.go b/util/spd_tools/intel/lp4x/gen_spd.go index acdc265..2465815 100644 --- a/util/spd_tools/intel/lp4x/gen_spd.go +++ b/util/spd_tools/intel/lp4x/gen_spd.go @@ -494,6 +494,8 @@ SPDIndexTAAMinFineOffset = 123 SPDIndexTCKMaxFineOffset = 124 SPDIndexTCKMinFineOffset = 125 + SPDIndexManufacturerPartNumberStartByte = 329 + SPDIndexManufacturerPartNumberEndByte = 348
/* SPD Byte Value */
@@ -549,6 +551,9 @@
/* Write Latency Set A and Read Latency DBI-RD disabled. */ SPDValueReadWriteLatency = 0x00 + + /* As per JEDEC spec, unused digits of manufacturer part number are left as blank. */ + SPDValueManufacturerPartNumberBlank = 0x20 )
var SPDAttribTable = map[int]SPDAttribTableEntry { @@ -609,9 +614,19 @@ return ioutil.WriteFile(filepath.Join(SPDDirName, SPDManifestFileName), []byte(s), 0644) }
+func isManufacturerPartNumberByte(index int) bool { + if index >= SPDIndexManufacturerPartNumberStartByte && index <= SPDIndexManufacturerPartNumberEndByte { + return true + } + return false +} + func getSPDByte(index int, memAttribs *memAttributes) byte { e, ok := SPDAttribTable[index] if ok == false { + if isManufacturerPartNumberByte(index) { + return SPDValueManufacturerPartNumberBlank + } return 0x00 }
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42023 )
Change subject: spd/lp4x: Set manufacturer part name to blank (0x20) ......................................................................
Patch Set 11:
Automatic boot test returned (PASS/FAIL/TOTAL): 4/0/4 Emulation targets: "QEMU x86 q35/ich9" using payload TianoCore : SUCCESS : https://lava.9esec.io/r/5299 "QEMU x86 q35/ich9" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/5298 "QEMU x86 i440fx/piix4" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/5297 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/5296
Please note: This test is under development and might not be accurate at all!
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9elements QA (Code Review) -
Furquan Shaikh (Code Review)
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Karthik Ramasubramanian (Code Review)
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Nick Vaccaro (Code Review)
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Patrick Georgi (Code Review)
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Paul Menzel (Code Review)