V Sowmya has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48230 )
Change subject: mb/intel/adlrvp: Add PMC.MUX.CONx device config for Conn2/3 ......................................................................
mb/intel/adlrvp: Add PMC.MUX.CONx device config for Conn2/3
This patch adds the PMC MUX and CONx devices for adlrvp for conn2/3.
BUG=b:170607415 TEST=Built and booted adlrvp. Verified the PMC.MUX CONx objects in SSDT tables.
Change-Id: I52afbd429750cfa416f4ed93aeb1be590f8c3a5c Signed-off-by: V Sowmya v.sowmya@intel.com --- M src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb 1 file changed, 14 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/48230/1
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb b/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb index 8033d3d..e5d7bb2 100644 --- a/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb +++ b/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb @@ -27,6 +27,20 @@ register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" device generic 1 alias conn1 on end end + chip drivers/intel/pmc_mux/conn + register "usb2_port_number" = "3" + register "usb3_port_number" = "3" + # SBU is fixed, HSL follows CC + register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" + device generic 2 alias conn2 on end + end + chip drivers/intel/pmc_mux/conn + register "usb2_port_number" = "5" + register "usb3_port_number" = "4" + # SBU is fixed, HSL follows CC + register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" + device generic 3 alias conn3 on end + end end end end # PMC