V Sowmya has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48230 )
Change subject: mb/intel/adlrvp: Add PMC.MUX.CONx device config for Conn2/3 ......................................................................
mb/intel/adlrvp: Add PMC.MUX.CONx device config for Conn2/3
This patch adds the PMC MUX and CONx devices for adlrvp for conn2/3.
BUG=b:170607415 TEST=Built and booted adlrvp. Verified the PMC.MUX CONx objects in SSDT tables.
Change-Id: I52afbd429750cfa416f4ed93aeb1be590f8c3a5c Signed-off-by: V Sowmya v.sowmya@intel.com --- M src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb 1 file changed, 14 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/48230/1
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb b/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb index 8033d3d..e5d7bb2 100644 --- a/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb +++ b/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb @@ -27,6 +27,20 @@ register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" device generic 1 alias conn1 on end end + chip drivers/intel/pmc_mux/conn + register "usb2_port_number" = "3" + register "usb3_port_number" = "3" + # SBU is fixed, HSL follows CC + register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" + device generic 2 alias conn2 on end + end + chip drivers/intel/pmc_mux/conn + register "usb2_port_number" = "5" + register "usb3_port_number" = "4" + # SBU is fixed, HSL follows CC + register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" + device generic 3 alias conn3 on end + end end end end # PMC
Hello build bot (Jenkins), Subrata Banik,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48230
to look at the new patch set (#2).
Change subject: mb/intel/adlrvp: Add PMC.MUX.CONx device config for Conn2/3 ......................................................................
mb/intel/adlrvp: Add PMC.MUX.CONx device config for Conn2/3
This patch adds the PMC MUX and CONx devices for adlrvp for conn2/3.
BUG=b:170607415 TEST=Built and booted adlrvp. Verified the PMC.MUX CONx objects in SSDT tables.
Change-Id: I52afbd429750cfa416f4ed93aeb1be590f8c3a5c Signed-off-by: V Sowmya v.sowmya@intel.com --- M src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb 1 file changed, 16 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/48230/2
V Sowmya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48230 )
Change subject: mb/intel/adlrvp: Add PMC.MUX.CONx device config for Conn2/3 ......................................................................
Set Ready For Review
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48230 )
Change subject: mb/intel/adlrvp: Add PMC.MUX.CONx device config for Conn2/3 ......................................................................
Patch Set 3: Code-Review+2
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48230 )
Change subject: mb/intel/adlrvp: Add PMC.MUX.CONx device config for Conn2/3 ......................................................................
Patch Set 3: -Code-Review
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48230 )
Change subject: mb/intel/adlrvp: Add PMC.MUX.CONx device config for Conn2/3 ......................................................................
Patch Set 3: Code-Review+2
Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Subrata Banik,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48230
to look at the new patch set (#4).
Change subject: mb/intel/adlrvp: Add PMC.MUX.CONx device config for Conn2 ......................................................................
mb/intel/adlrvp: Add PMC.MUX.CONx device config for Conn2
This patch adds the PMC MUX and CONx devices for adlrvp for conn2.
BUG=b:170607415 TEST=Built and booted adlrvp. Verified the PMC.MUX CONx objects in SSDT tables.
Change-Id: I52afbd429750cfa416f4ed93aeb1be590f8c3a5c Signed-off-by: V Sowmya v.sowmya@intel.com --- M src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb 1 file changed, 9 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/48230/4
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48230 )
Change subject: mb/intel/adlrvp: Add PMC.MUX.CONx device config for Conn2 ......................................................................
Patch Set 4: Code-Review+2
Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48230 )
Change subject: mb/intel/adlrvp: Add PMC.MUX.CONx device config for Conn2 ......................................................................
mb/intel/adlrvp: Add PMC.MUX.CONx device config for Conn2
This patch adds the PMC MUX and CONx devices for adlrvp for conn2.
BUG=b:170607415 TEST=Built and booted adlrvp. Verified the PMC.MUX CONx objects in SSDT tables.
Change-Id: I52afbd429750cfa416f4ed93aeb1be590f8c3a5c Signed-off-by: V Sowmya v.sowmya@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/48230 Reviewed-by: Subrata Banik subrata.banik@intel.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb 1 file changed, 9 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb b/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb index 8033d3d..9130a12 100644 --- a/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb +++ b/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb @@ -3,9 +3,10 @@ device domain 0 on device pci 1f.0 on chip ec/google/chromeec - device pnp 0c09.0 on end use conn0 as mux_conn[0] use conn1 as mux_conn[1] + use conn2 as mux_conn[2] + device pnp 0c09.0 on end end end # eSPI device pci 1f.2 hidden @@ -27,6 +28,13 @@ register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" device generic 1 alias conn1 on end end + chip drivers/intel/pmc_mux/conn + register "usb2_port_number" = "3" + register "usb3_port_number" = "3" + # SBU is fixed, HSL follows CC + register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" + device generic 2 alias conn2 on end + end end end end # PMC
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Subrata Banik (Code Review) -
V Sowmya (Code Review)