Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44352 )
Change subject: soc/amd/common/espi_util: espi_send_command: improve error message ......................................................................
soc/amd/common/espi_util: espi_send_command: improve error message
It's only an error if bits other than ESPI_STATUS_DNCMD_COMPLETE are set in the status register. If ESPI_STATUS_DNCMD_COMPLETE isn't set, the command failed, so we expect that one to be set.
Change-Id: I6f1fb5a59b1ecadd6724a07212626f21fb90e7e7 Signed-off-by: Felix Held felix-coreboot@felixheld.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/44352 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com --- M src/soc/amd/common/block/lpc/espi_util.c 1 file changed, 2 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/soc/amd/common/block/lpc/espi_util.c b/src/soc/amd/common/block/lpc/espi_util.c index 4415615..b09d61d 100644 --- a/src/soc/amd/common/block/lpc/espi_util.c +++ b/src/soc/amd/common/block/lpc/espi_util.c @@ -470,7 +470,8 @@ }
if (status & ~ESPI_STATUS_DNCMD_COMPLETE) { - espi_show_failure(cmd, "Error: eSPI status register bits set", status); + espi_show_failure(cmd, "Error: unexpected eSPI status register bits set", + status); return -1; }