[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block/cpu: Introduce CAR_HAS_L3_PROTECTED_WAYS Kconfig

[Furquan Shaikh (Code Review)]

Attention is currently required from: Rizwan Qureshi, Subrata Banik, Angel Pons.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48344 )

Change subject: soc/intel/common/block/cpu: Introduce CAR_HAS_L3_PROTECTED_WAYS Kconfig
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Patch Set 15:

(1 comment)

File src/soc/intel/common/block/cpu/car/cache_as_ram.S:

https://review.coreboot.org/c/coreboot/+/48344/comment/a2a4ea30_0535fe4f 
PS15, Line 549: /*
              : 	 * Program MSR 0x1892 Non-Eviction Mask #2
              : 	 * IA32_CR_SF_QOS_MASK_2 = ((1 << data ways) - 1)
              : 	 */
              : 	mov	%esi, %eax
              : 	xorl	%edx, %edx
              : 	mov	$IA32_CR_SF_QOS_MASK_2, %ecx
              : 	wrmsr
Why is this programmed only for L3 protected ways? SF QOS mask 2 must be programmed always i.e. it should be set to non-evict mask above when setting SF QOS mask 1.