Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Tim Wawrzynczak, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46265
to look at the new patch set (#8).
Change subject: mb/intel/adlrvp: Add ADL-P ramstage mainboard code ......................................................................
mb/intel/adlrvp: Add ADL-P ramstage mainboard code
List of changes: 1. Add devicetree.cb config parameters related to FSP-S UPD 2. Configure GPIO as per ADL-P RVP 3. Add files required for Ramstage (ec.c, mainboard.c) 4. Add smihandler.c for SMM
TEST=Able to reach till payload
Change-Id: I120885956c88babfa09d24ce1079d49306919b8a Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/mainboard/intel/adlrvp/Makefile.inc A src/mainboard/intel/adlrvp/ec.c A src/mainboard/intel/adlrvp/mainboard.c A src/mainboard/intel/adlrvp/smihandler.c M src/mainboard/intel/adlrvp/variants/adlrvp_p/Makefile.inc M src/mainboard/intel/adlrvp/variants/adlrvp_p/devicetree.cb A src/mainboard/intel/adlrvp/variants/adlrvp_p/gpio.c A src/mainboard/intel/adlrvp/variants/baseboard/include/baseboard/ec.h M src/mainboard/intel/adlrvp/variants/baseboard/include/baseboard/variants.h 9 files changed, 594 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/46265/8