Julius Werner has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds a new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt,secure=on,virtualization=on \ -cpu cortex-a53 -bios build/coreboot.rom -m 8192M -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi d0iasm.pub@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/33387 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Raul Rangel rrangel@chromium.org Reviewed-by: Julius Werner jwerner@chromium.org --- A Documentation/mainboard/emulation/qemu-aarch64.md M Documentation/mainboard/index.md A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/bootblock_custom.S A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c 14 files changed, 318 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved Raul Rangel: Looks good to me, approved
diff --git a/Documentation/mainboard/emulation/qemu-aarch64.md b/Documentation/mainboard/emulation/qemu-aarch64.md new file mode 100644 index 0000000..ee4c9e7 --- /dev/null +++ b/Documentation/mainboard/emulation/qemu-aarch64.md @@ -0,0 +1,47 @@ +# QEMU AArch64 emulator +This page discribes how to build and run coreboot for QEMU/AArch64. +You can use LinuxBoot via `make menuconfig` or an arbitrary FIT image +as a payload for QEMU/AArch64. + +## Running coreboot in QEMU +```bash +qemu-system-aarch64 -bios ./build/coreboot.rom \ + -M virt,secure=on,virtualization=on -cpu cortex-a53 \ + -nographic -m 8912M +``` + +- The default CPU in QEMU for AArch64 is a cortex-a15 which is 32-bit +ARM CPU. You need to specify 64-bit ARM CPU via `-cpu cortex-a53`. +- The default privilege level in QEMU for AArch64 is EL1 that we can't +have the right to access EL3/EL2 registers. You need to enable EL3/EL2 +via `-machine secure=on,virtualization=on`. +- You need to specify the size of memory more than 544 MiB because 512 +MiB is reserved for the kernel. + +## Building coreboot with an arbitrary FIT payload +There are 3 steps to make coreboot.rom for QEMU/AArch64. If you select +LinuxBoot, step 2 and 3 have done by LinuxBoot. +1. Get a DTB (Device Tree Blob) +2. Build a FIT image with a DTB +3. Add a FIT image to coreboot.rom + +### 1. Get a DTB +You can get the DTB from QEMU with the following command. +``` +$ qemu-system-aarch64 \ + -M virt,dumpdtb=virt.dtb,secure=on,virtualization=on \ + -cpu cortex-a53 -nographic -m 2048M +``` + +### 2. Build a FIT image with a DTB +You need to write an image source file that has an `.its` extension to +configure kernels, ramdisks, and DTBs. +See [Flattened uImage Tree documentation](../../lib/payloads/fit.md) for more details. + +### 3. Add a FIT image to coreboot.rom +You can use cbfstool to add the payload you created in step 2 to +the coreboot.rom. +``` +$ ./build/cbfstool ./build/coreboot.rom add -f <path-to-a-payload>/uImage \ + -n fallback/payload -t fit -c lzma +``` diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md index 8c3f6ea..0f3105f 100644 --- a/Documentation/mainboard/index.md +++ b/Documentation/mainboard/index.md @@ -24,6 +24,7 @@
- [Spike RISC-V emulator](emulation/spike-riscv.md) - [Qemu RISC-V emulator](emulation/qemu-riscv.md) +- [Qemu AArch64 emulator](emulation/qemu-aarch64.md)
## Intel
diff --git a/src/mainboard/emulation/qemu-aarch64/Kconfig b/src/mainboard/emulation/qemu-aarch64/Kconfig new file mode 100644 index 0000000..7d8d7b2 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/Kconfig @@ -0,0 +1,51 @@ +# +# This file is part of the coreboot project. +# +# Copyright (C) 2019 Asami Doi d0iasm.pub@gmail.com. +# +# SPDX-License-Identifier: GPL-2.0-or-later + +# Emulation for QEMU 2.8 ARM Virtual Machine (alias of virt-2.8) +# https://wiki.qemu.org/Documentation/Platforms/ARM + +if BOARD_EMULATION_QEMU_AARCH64 + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select ARCH_BOOTBLOCK_ARMV8_64 + select ARCH_VERSTAGE_ARMV8_64 + select ARCH_ROMSTAGE_ARMV8_64 + select ARCH_RAMSTAGE_ARMV8_64 + select ARM64_USE_ARCH_TIMER + select BOARD_ROMSIZE_KB_4096 + select BOOTBLOCK_CONSOLE + select BOOTBLOCK_CUSTOM + select BOOT_DEVICE_NOT_SPI_FLASH + select CONSOLE_SERIAL + select DRIVERS_UART_PL011 + select HAVE_LINEAR_FRAMEBUFFER + select MAINBOARD_FORCE_NATIVE_VGA_INIT + select MAINBOARD_HAS_NATIVE_VGA_INIT + select MISSING_BOARD_RESET + +config MAINBOARD_DIR + string + default emulation/qemu-aarch64 + +config MAINBOARD_PART_NUMBER + string + default "QEMU AArch64" + +config MAX_CPUS + int + default 2 + +config MAINBOARD_VENDOR + string + default "QEMU" + +config DRAM_SIZE_MB + int + default 1024 + +endif # BOARD_EMULATION_QEMU_AARCH64 diff --git a/src/mainboard/emulation/qemu-aarch64/Kconfig.name b/src/mainboard/emulation/qemu-aarch64/Kconfig.name new file mode 100644 index 0000000..8c14fc1 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/Kconfig.name @@ -0,0 +1,5 @@ +config BOARD_EMULATION_QEMU_AARCH64 + bool "QEMU AArch64 (virt)" + help + To execute, do: + qemu-system-aarch64 -bios ./build/coreboot.rom -M virt,secure=on,virtualization=on -cpu cortex-a53 -nographic -m 8192M diff --git a/src/mainboard/emulation/qemu-aarch64/Makefile.inc b/src/mainboard/emulation/qemu-aarch64/Makefile.inc new file mode 100644 index 0000000..38ecdd1 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/Makefile.inc @@ -0,0 +1,25 @@ +# +# This file is part of the coreboot project. +# +# Copyright (C) 2019 Asami Doi d0iasm.pub@gmail.com +# +# SPDX-License-Identifier: GPL-2.0-or-later + +romstage-y += cbmem.c +ramstage-y += cbmem.c + +bootblock-y += media.c +romstage-y += media.c +ramstage-y += media.c + +bootblock-y += mmio.c +romstage-y += mmio.c +ramstage-y += mmio.c + +bootblock-y += memlayout.ld +romstage-y += memlayout.ld +ramstage-y += memlayout.ld + +bootblock-y += bootblock_custom.S + +CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include diff --git a/src/mainboard/emulation/qemu-aarch64/board_info.txt b/src/mainboard/emulation/qemu-aarch64/board_info.txt new file mode 100644 index 0000000..92fafa5 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/board_info.txt @@ -0,0 +1,3 @@ +Board name: QEMU AArch64 (virt) +Category: emulation +Board URL: http://wiki.qemu.org/Main_Page diff --git a/src/mainboard/emulation/qemu-aarch64/bootblock_custom.S b/src/mainboard/emulation/qemu-aarch64/bootblock_custom.S new file mode 100644 index 0000000..f9e85d0 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/bootblock_custom.S @@ -0,0 +1,36 @@ +/* + * Early initialization code for aarch64 (a.k.a. armv8) + * + * Copyright 2019 Asami Doi d0iasm.pub@gmail.com + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include <arch/asm.h> + +ENTRY(_start) + /* Setup CPU. */ + bl arm64_init_cpu + + /* Get code positions. */ + ldr x1, =_flash + ldr x0, =_bootblock + + /* Calculate bootblock size. */ + ldr x2, =_ebootblock + sub x2, x2, x0 + + /* Call memcpy in arch/arm64/memcpy.S */ + bl memcpy + dmb sy + + /* Calculate relocation offset between bootblock in flash and in DRAM. */ + ldr x0, =_flash + ldr x1, =_bootblock + sub x1, x1, x0 + + /* Jump to main() in DRAM. */ + adr x0, main + add x0, x0, x1 + blr x0 +ENDPROC(_start) diff --git a/src/mainboard/emulation/qemu-aarch64/cbmem.c b/src/mainboard/emulation/qemu-aarch64/cbmem.c new file mode 100644 index 0000000..c50254d --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/cbmem.c @@ -0,0 +1,16 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2019 Asami Doi d0iasm.pub@gmail.com + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include <cbmem.h> +#include <ramdetect.h> +#include <symbols.h> + +void *cbmem_top(void) +{ + return _dram + (probe_ramsize((uintptr_t)_dram, CONFIG_DRAM_SIZE_MB) * MiB); +} diff --git a/src/mainboard/emulation/qemu-aarch64/devicetree.cb b/src/mainboard/emulation/qemu-aarch64/devicetree.cb new file mode 100644 index 0000000..010cae8 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/devicetree.cb @@ -0,0 +1,11 @@ +# +# This file is part of the coreboot project. +# +# Copyright (C) 2019 Asami Doi d0iasm.pub@gmail.com. +# +# SPDX-License-Identifier: GPL-2.0-or-later + +# This file exists only to avoid a compile error. It needs a devicetree.cb that is not empty. +chip drivers/generic/generic # I2C0 controller + device i2c 6 on end # Fake component for testing +end diff --git a/src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h b/src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h new file mode 100644 index 0000000..6f0c802 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h @@ -0,0 +1,34 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Asami Doi d0iasm.pub@gmail.com + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +/* + * Memory map for QEMU virt machine since + * a578cdfbdd8f9beff5ced52b7826ddb1669abbbf (June 2019): + * + * 0..128MiB (0x0000_0000..0x0080_0000) is the space for a flash device. + * 128MiB..256MiB (0x0080_0000..0x0100_0000) is used for miscellaneous device I/O. + * 256MiB..1GiB (0x0100_0000..0x4000_0000) is reserved for possible future PCI support. + * 1GiB.. (0x4000_0000) is RAM and the size depends on initial RAM and device memory settings + * + * 0x0000_0000..0x0080_0000: Flash memory + * 0x0900_0000..0x0900_1000: UART (PL011) + * 0x0901_0000..0x0901_1000: RTC (PL031) + * 0x0903_0000..0x0903_1000: GPIO (PL061) + * 0x0904_0000..0x0904_1000: Secure UART (PL011) + * 0x0905_0000..0x0907_0000: SMMU (smmu-v3) + * 0x0a00_0000..0x0a00_0200: MMIO (virtio) + * 0x0c00_0000..0x0e00_0000: Platform bus + * 0x4000_0000..: RAM + */ +#define VIRT_UART_BASE 0x09000000 +#define VIRT_RTC_BASE 0x09010000 +#define VIRT_GPIO_BASE 0x09030000 +#define VIRT_SECURE_UART_BASE 0x09040000 +#define VIRT_SMMU_BASE 0x09050000 +#define VIRT_MMIO_BASE 0x0a000000 +#define VIRT_PLATFORM_BUS_BASE 0x0c000000 diff --git a/src/mainboard/emulation/qemu-aarch64/mainboard.c b/src/mainboard/emulation/qemu-aarch64/mainboard.c new file mode 100644 index 0000000..5735455 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/mainboard.c @@ -0,0 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2019 Asami Doi d0iasm.pub@gmail.com + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include <cbmem.h> +#include <ramdetect.h> +#include <symbols.h> +#include <device/device.h> + +static void mainboard_enable(struct device *dev) +{ + int ram_size_mb = probe_ramsize((uintptr_t)_dram, CONFIG_DRAM_SIZE_MB); + ram_resource(dev, 0, (uintptr_t)_dram / KiB, ram_size_mb * KiB); +} + +struct chip_operations mainboard_ops = { + .name = "qemu_aarch64", + .enable_dev = mainboard_enable, +}; diff --git a/src/mainboard/emulation/qemu-aarch64/media.c b/src/mainboard/emulation/qemu-aarch64/media.c new file mode 100644 index 0000000..03f0eb1 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/media.c @@ -0,0 +1,18 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2019 Asami Doi d0iasm.pub@gmail.com + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include <boot_device.h> + +/* Maps directly to NOR flash up to ROM size. */ +static const struct mem_region_device boot_dev = + MEM_REGION_DEV_RO_INIT((void *)0x0, CONFIG_ROM_SIZE); + +const struct region_device *boot_device_ro(void) +{ + return &boot_dev.rdev; +} diff --git a/src/mainboard/emulation/qemu-aarch64/memlayout.ld b/src/mainboard/emulation/qemu-aarch64/memlayout.ld new file mode 100644 index 0000000..0b52d31 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/memlayout.ld @@ -0,0 +1,33 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Asami Doi d0iasm.pub@gmail.com + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include <memlayout.h> +#include <arch/header.ld> + +/* + * Memory map for QEMU virt machine since + * a578cdfbdd8f9beff5ced52b7826ddb1669abbbf (June 2019): + * + * 0..128MiB (0x0000_0000..0x0080_0000) is the space for a flash device. + * 128MiB..256MiB (0x0080_0000..0x0100_0000) is used for miscellaneous device I/O. + * 256MiB..1GiB (0x0100_0000..0x4000_0000) is reserved for possible future PCI support. + * 1GiB.. (0x4000_0000) is RAM and the size depends on initial RAM and device memory settings. + */ +SECTIONS +{ + REGION(flash, 0x00000000, CONFIG_ROM_SIZE, 8) + + DRAM_START(0x40000000) + BOOTBLOCK(0x60010000, 64K) + STACK(0x60020000, 64K) + ROMSTAGE(0x60030000, 128K) + RAMSTAGE(0x60070000, 16M) + + TTB(0x61100000, 16K) + POSTRAM_CBFS_CACHE(0x61110000, 1M) +} diff --git a/src/mainboard/emulation/qemu-aarch64/mmio.c b/src/mainboard/emulation/qemu-aarch64/mmio.c new file mode 100644 index 0000000..717d858 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/mmio.c @@ -0,0 +1,15 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2019 Asami Doi d0iasm.pub@gmail.com. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include <console/uart.h> +#include <mainboard/addressmap.h> + +uintptr_t uart_platform_base(int idx) +{ + return VIRT_UART_BASE; +}