Attention is currently required from: YH Lin, Tim Wawrzynczak, Zhuohao Lee, Felix Held.
Raihow Shi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62321 )
Change subject: mb/google/brask/variants/moli: init overridetree for moli
......................................................................
Patch Set 5:
(4 comments)
This change is ready for review.
File src/mainboard/google/brya/variants/moli/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/62321/comment/c874b112_c146300c
PS2, Line 30: register "wake" = "GPE0_PME_B0"
: device generic 0 on end
nit: one too many tabs here, remove extra one please
done
https://review.coreboot.org/c/coreboot/+/62321/comment/4abe53b7_d549a02a
PS2, Line 79: chip soc/intel/common/block/pcie/rtd3
: register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B3)"
: register "srcclk_pin" = "1"
: device generic 0 alias emmc_rtd3 on end
: end # Enable PCIe-to-eMMC bridge PCIE 12 using clk 1
please indent this section by one more tab
done
https://review.coreboot.org/c/coreboot/+/62321/comment/24a08bd3_11e66af3
PS2, Line 125: register "group" = "ACPI_PLD_GROUP(1, 1)"
We are switching to using a more fully-specified _PLD object, can you please update this to match? S […]
done
https://review.coreboot.org/c/coreboot/+/62321/comment/dbe76f7e_b8393c34
PS2, Line 196:
tab please
done
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