Ricardo Ribalda has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46962 )
Change subject: mb/google/hatch/jinlon: Describe the privacy_gpio ......................................................................
mb/google/hatch/jinlon: Describe the privacy_gpio
Add information regarding the privacy pin on the overridetree and gpio.
Change-Id: Ifa628dda03f3f65976850aeabaf516f528a921b7 Signed-off-by: Ricardo Ribalda ribalda@chromium.org --- M src/mainboard/google/hatch/variants/jinlon/gpio.c M src/mainboard/google/hatch/variants/jinlon/overridetree.cb 2 files changed, 12 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/46962/1
diff --git a/src/mainboard/google/hatch/variants/jinlon/gpio.c b/src/mainboard/google/hatch/variants/jinlon/gpio.c index 88f0092..3b6a76f 100644 --- a/src/mainboard/google/hatch/variants/jinlon/gpio.c +++ b/src/mainboard/google/hatch/variants/jinlon/gpio.c @@ -18,6 +18,8 @@ * using this pin, expose this pin to driver. */ PAD_CFG_GPO(GPP_C15, 1, DEEP), + /* D4 : Camera Privacy Status */ + PAD_CFG_GPI(GPP_D4, NONE, DEEP), /* E0 : View Angle Management */ PAD_CFG_GPO(GPP_E0, 0, DEEP), /* F3 : MEM_STRAP_3 */ diff --git a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb index fc3bb85..22cc5d3 100644 --- a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb +++ b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb @@ -80,6 +80,16 @@ device generic 0 on end end end # Integrated Graphics Device + device pci 14.0 on + chip drivers/usb/acpi + device usb 0.0 on + chip drivers/usb/acpi + register "privacy_gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_D4)" + device usb 2.6 on end + end + end + end + end # USB xHCI device pci 15.0 on chip drivers/i2c/generic register "hid" = ""ELAN0000""