Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34349 )
Change subject: soc/intel/{cnl,icl}: Add support to configure interrupt overrides
......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34349/4/src/soc/intel/cannonlake/fs...
File src/soc/intel/cannonlake/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/34349/4/src/soc/intel/cannonlake/fs...
PS4, Line 410: DevIntConfigPtr
Could you point to some documentation on the format? It's not in coreboot nor in any public FSP inte […]
This UPD holds the pointer to array of SI_PCH_DEVICE_INTERRUPT_CONFIG for PCI IRQ configuration , this struct is documented in integration guide.
--
To view, visit
https://review.coreboot.org/c/coreboot/+/34349
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: If55701b7ad292e3357d0b419bb6168bd2c3e4030
Gerrit-Change-Number: 34349
Gerrit-PatchSet: 4
Gerrit-Owner: Aamir Bohra
aamir.bohra@intel.com
Gerrit-Reviewer: Aamir Bohra
aamir.bohra@intel.com
Gerrit-Reviewer: Arthur Heymans
arthur@aheymans.xyz
Gerrit-Reviewer: Patrick Rudolph
siro@das-labor.org
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Furquan Shaikh
furquan@google.com
Gerrit-CC: Paul Menzel
paulepanter@users.sourceforge.net
Gerrit-Comment-Date: Mon, 22 Jul 2019 13:04:56 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Arthur Heymans
arthur@aheymans.xyz
Gerrit-MessageType: comment