[coreboot-gerrit] Change in coreboot[master]: nb/intel: Fix 16-bit read/write PCI_COMMAND register

[HAOUAS Elyes (Code Review)]

Hello build bot (Jenkins), Damien Zammit, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/40835

to look at the new patch set (#5).

Change subject: nb/intel: Fix 16-bit read/write PCI_COMMAND register
......................................................................

nb/intel: Fix 16-bit read/write PCI_COMMAND register

Change-Id: I7c7fb10308a6fcd1ead292c53ed03ddc693f6f15
Signed-off-by: Elyes HAOUAS 
---
M src/northbridge/intel/gm45/iommu.c
M src/northbridge/intel/gm45/northbridge.c
M src/northbridge/intel/pineview/northbridge.c
M src/northbridge/intel/x4x/northbridge.c
4 files changed, 6 insertions(+), 20 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/40835/5