Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48625 )
Change subject: mb/google/dedede/var/sasuke: Update overridetree.cb ......................................................................
Patch Set 3:
(8 comments)
https://review.coreboot.org/c/coreboot/+/48625/3/src/mainboard/google/dedede... File src/mainboard/google/dedede/variants/sasuke/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/48625/3/src/mainboard/google/dedede... PS3, Line 2: # Disable HPD for DDI ports B/C Why?
https://review.coreboot.org/c/coreboot/+/48625/3/src/mainboard/google/dedede... PS3, Line 6: # Disable DDC for DDI ports B/C Why?
https://review.coreboot.org/c/coreboot/+/48625/3/src/mainboard/google/dedede... PS3, Line 40: .pre_emp_bias = 0x4, What does 0x4 correspond to? Can you please add that in the jasperlake/include/soc/usb.h file?
https://review.coreboot.org/c/coreboot/+/48625/3/src/mainboard/google/dedede... PS3, Line 84: .scl_lcnt = 200, : .scl_hcnt = 120, What is the measured I2C bus frequency with this high and low count?
https://review.coreboot.org/c/coreboot/+/48625/3/src/mainboard/google/dedede... PS3, Line 93: register "desc" = ""Root Hub"" : register "type" = "UPC_TYPE_HUB" No need to override. This is the same as in baseboard devicetree.
https://review.coreboot.org/c/coreboot/+/48625/3/src/mainboard/google/dedede... PS3, Line 100: register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D13)" : register "enable_delay_ms" = "20" Does the camera needs to be turned off during S0ix entry and turned on during S0ix exit?
https://review.coreboot.org/c/coreboot/+/48625/3/src/mainboard/google/dedede... PS3, Line 136: device pci 15.2 on end Turn off device 15.3 if you are not planning to use MIPI Camera.
https://review.coreboot.org/c/coreboot/+/48625/3/src/mainboard/google/dedede... PS3, Line 137: device pci 1c.7 on end Are you planning to use a discrete WiFi solution? If not, this can be turned off too.