Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35523 )
Change subject: mb/acer: Add Acer Aspire VN7-572G ......................................................................
Patch Set 154:
(5 comments)
https://review.coreboot.org/c/coreboot/+/35523/144/src/mainboard/acer/aspire... File src/mainboard/acer/aspire_vn7_572g/acpi/battery.asl:
https://review.coreboot.org/c/coreboot/+/35523/144/src/mainboard/acer/aspire... PS144, Line 25: /* TODO: Implement paging? */
I'd suggest checking what vendor does in detail, especially if there's some writes to switch between […]
Ack, paging is being discussed in a different comment. Marking as done.
https://review.coreboot.org/c/coreboot/+/35523/144/src/mainboard/acer/aspire... File src/mainboard/acer/aspire_vn7_572g/acpi/platform.asl:
https://review.coreboot.org/c/coreboot/+/35523/144/src/mainboard/acer/aspire... PS144, Line 27: If (CondRefOf (_SB.MPTS))
Ah, then I'd rebase CB:38318 so that it can be applied directly on master
Done
https://review.coreboot.org/c/coreboot/+/35523/145/src/mainboard/acer/aspire... File src/mainboard/acer/aspire_vn7_572g/cmos.layout:
https://review.coreboot.org/c/coreboot/+/35523/145/src/mainboard/acer/aspire... PS145, Line 7: #0 112 r 0 lower_reserved
So, this is something that I don't understand. […]
Done, following CB:46311.
https://review.coreboot.org/c/coreboot/+/35523/145/src/mainboard/acer/aspire... PS145, Line 8: #112 264 r 0 unused
As above.
Done
https://review.coreboot.org/c/coreboot/+/35523/145/src/mainboard/acer/aspire... PS145, Line 36: #1024 1024 r 0 upper_reserved
I don't think it's reserved. […]
Should I drop it?