[coreboot-gerrit] Change in coreboot[master]: drivers/intel/gma: Add `new-pch.asl` for Skylake+

[Benjamin Doron (Code Review)]

Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31503 )

Change subject: drivers/intel/gma: Add `new-pch.asl` for Skylake+
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Patch Set 1:
> b) The TRAP only makes sense if there is an SMI handler to handle it. Maybe we
> should identify the platforms that do that and disable the call on the others.

It's smitraphandler.c and smihandler.c, I presume?

"IOTRAP(1) currently unused" (https://github.com/coreboot/coreboot/blob/master/src/soc/intel/common/block/...).

I looked through the tree and it definitely seems as though this line has only been inherited from prior southbridges and SoCs, but it isn't used anywhere.