[coreboot-gerrit] Change in coreboot[master]: treewide: Configure PCI Bus Master based on Kconfig option

[Kyösti Mälkki (Code Review)]

Attention is currently required from:  Felix Singer, Nico Huber, Angel Pons.
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42460 )

Change subject: treewide: Configure PCI Bus Master based on Kconfig option
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Patch Set 16:

(1 comment)

Patchset:

PS16:
> AIUI, at least all the Intel devices use (virtual) PCI INT lines + PIRQ. […]

13.1.3 PCICMD—PCI COMMAND Register (LPC I/F—D31:F0)
2 Bus Master Enable (BME) — RO. Bus Masters cannot be disabled.

By "PCI device with IOAPIC MMIO" I mean the PCI device that decodes MMIO at 0xfec00000 and is the PCI initiator for interrupt messages. LPC on Intel, SMBUS on AMD, AFAIR.