[coreboot-gerrit] Change in coreboot[master]: nb/intel/gm45: Fix 16-bit read/write PCI_COMMAND register

[HAOUAS Elyes (Code Review)]

Hello Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/40835

to look at the new patch set (#2).

Change subject: nb/intel/gm45: Fix 16-bit read/write PCI_COMMAND register
......................................................................

nb/intel/gm45: Fix 16-bit read/write PCI_COMMAND register

Change-Id: I7c7fb10308a6fcd1ead292c53ed03ddc693f6f15
Signed-off-by: Elyes HAOUAS 
---
M src/northbridge/intel/gm45/iommu.c
M src/northbridge/intel/gm45/northbridge.c
2 files changed, 4 insertions(+), 7 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/40835/2