[coreboot-gerrit] Change in coreboot[master]: soc/amd/common/block/spi: Add support for common SPI configuration

[Furquan Shaikh (Code Review)]

Hello Patrick Georgi, Martin Roth,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/41248

to look at the new patch set (#2).

Change subject: soc/amd/common/block/spi: Add support for common SPI configuration
......................................................................

soc/amd/common/block/spi: Add support for common SPI configuration

This change adds support for following SPI configuration functions to
common block SPI driver and exposes them to be used by SoC:
1. fch_spi_early_init(): Sets up SPI ROM base, enables SPI ROM,
enables prefetching, disables 4dw burst mode and sets SPI speed and mode.
2. fch_spi_config_modes(): This allows SoC to configure SPI speed and
mode. It uses SPI settings from soc_amd_common_config to configure the
speed and mode.

These functions expect SoC to include soc_amd_common_config in SoC
chip config and mainboard to configure these settings in device tree.

Signed-off-by: Furquan Shaikh 
Change-Id: Ia4f231bab69e8450005dd6abe7a8e014d5eb7261
---
M src/soc/amd/common/block/include/amdblocks/chip.h
A src/soc/amd/common/block/include/amdblocks/spi.h
M src/soc/amd/common/block/spi/Makefile.inc
A src/soc/amd/common/block/spi/fch_spi.c
M src/soc/amd/common/block/spi/fch_spi_ctrl.c
5 files changed, 202 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/41248/2