[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cpulib: Add debug message to mca_configure()

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31199 )

Change subject: soc/intel/cpulib: Add debug message to mca_configure()
......................................................................

soc/intel/cpulib: Add debug message to mca_configure()

Change-Id: Idfe93e454cc0ce0d8e06e23beaddee2f11f5eedd
Signed-off-by: Nico Huber 
Reviewed-on: https://review.coreboot.org/c/31199
Reviewed-by: Kyösti Mälkki 
Reviewed-by: Paul Menzel 
Reviewed-by: Angel Pons 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/common/block/cpu/cpulib.c
1 file changed, 2 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Kyösti Mälkki: Looks good to me, approved
  Paul Menzel: Looks good to me, but someone else must approve
  Angel Pons: Looks good to me, approved

diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c
index d18b50c..ece79d6 100644
--- a/src/soc/intel/common/block/cpu/cpulib.c
+++ b/src/soc/intel/common/block/cpu/cpulib.c
@@ -323,6 +323,8 @@
    int i;
    int num_banks;

+	printk(BIOS_DEBUG, "Clearing out pending MCEs\n");
+
    msr = rdmsr(IA32_MCG_CAP);
    num_banks = msr.lo & 0xff;
    msr.lo = msr.hi = 0;