[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Add PCH PCIe RPs wake up events to event log

[Tim Wawrzynczak (Code Review)]

Hello build bot (Jenkins), Furquan Shaikh, Patrick Rudolph, Karthik Ramasubramanian,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/47182

to look at the new patch set (#2).

Change subject: soc/intel/tigerlake: Add PCH PCIe RPs wake up events to event log
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soc/intel/tigerlake: Add PCH PCIe RPs wake up events to event log

All wakes by a PCH PCIe root port were lumped under one event source;
this commit splits them up so each root port gets its own ID in the
event log.

BUG=b:172279061
BRANCH=volteer

Signed-off-by: Tim Wawrzynczak 
Change-Id: Icebcac3b69c605ecf6df37733b641397ea3c3ad0
---
M src/soc/intel/tigerlake/elog.c
1 file changed, 38 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/47182/2