Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37400 )
Change subject: sb/amd/{agesa,pi}: use ACPIMMIO common block wherever possible ......................................................................
Patch Set 7:
(5 comments)
Marked some unresolved commits as followup work.
https://review.coreboot.org/c/coreboot/+/37400/2/src/southbridge/amd/agesa/h... File src/southbridge/amd/agesa/hudson/smbus_spd.c:
https://review.coreboot.org/c/coreboot/+/37400/2/src/southbridge/amd/agesa/h... PS2, Line 133: pm_io_write8(0x2c, ioBase | 1);
pm_io_write16() ?
Ack
https://review.coreboot.org/c/coreboot/+/37400/2/src/southbridge/amd/agesa/h... PS2, Line 134: __outbyte (ioBase + 0x0E, 66000000 / 400000 / 4); // set SMBus clock to 400 KHz
this is just outb() put perhaps swapped parameter order.
Ack
https://review.coreboot.org/c/coreboot/+/37400/5/src/southbridge/amd/cimx/sb... File src/southbridge/amd/cimx/sb800/late.c:
https://review.coreboot.org/c/coreboot/+/37400/5/src/southbridge/amd/cimx/sb... PS5, Line 40: #include <southbridge/amd/common/amd_pci_util.h>
missing <amdblocks/acpimmio. […]
Done
https://review.coreboot.org/c/coreboot/+/37400/2/src/southbridge/amd/pi/huds... File src/southbridge/amd/pi/hudson/smbus_spd.c:
https://review.coreboot.org/c/coreboot/+/37400/2/src/southbridge/amd/pi/huds... PS2, Line 134: pm_io_write8(0x2c, ioBase | 1);
pm_io_write16() perhaps?
Ack
https://review.coreboot.org/c/coreboot/+/37400/2/src/southbridge/amd/pi/huds... PS2, Line 135: __outbyte (ioBase + 0x0E, 66000000 / 400000 / 4); // set SMBus clock to 400 KHz
outb()
Ack