Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35523 )
Change subject: mb/acer: Add Acer Aspire VN7-572G ......................................................................
Patch Set 156:
(3 comments)
https://review.coreboot.org/c/coreboot/+/35523/122/src/mainboard/acer/aspire... File src/mainboard/acer/aspire_vn7_572g/acpi/battery.asl:
https://review.coreboot.org/c/coreboot/+/35523/122/src/mainboard/acer/aspire... PS122, Line 41: Offset (0xE0),
It's trapping to SMM in various places and I couldn't get DCI working (Skylake-U might not support i […]
I've found the following in the vendor firmware: "KbcPeim" registers 4 PPIs which don't seem to ever be used. 2 relate to EC's legacy IO (0x6C), the other are commands 0x90 and 0x91. If they aren't used, I can't get the arguments for the last two, but it wouldn't matter either.
"PeiOemModule" registers a function in what seems to be a proprietary table (tagged "$FNC"). I haven't looked through all of it, but one `outb` is issued and then further functions seem to be called if the system is on S3 resume. See `bootblock.c`.
"..Oem..SioInit.." (I forgot the name) issues `inb` against one of the COM ports, the conditionally executes a sequence of `outb`. There's a corresponding "..SioInit.." but it's probably generic code.
All the above aside, the paging ID is "EBID." I found it by looping "ectool" writes over portions of the memory space and checking this offset. Battery information is reported correctly now.
https://review.coreboot.org/c/coreboot/+/35523/145/src/mainboard/acer/aspire... File src/mainboard/acer/aspire_vn7_572g/acpi/battery.asl:
https://review.coreboot.org/c/coreboot/+/35523/145/src/mainboard/acer/aspire... PS145, Line 261: Local0 = EB0A
No, but I was reducing use of `EB0S` (EB0S & 1 = EB0A). […]
All functionality here appears to be working correctly. Marking as done.
https://review.coreboot.org/c/coreboot/+/35523/144/src/mainboard/acer/aspire... File src/mainboard/acer/aspire_vn7_572g/acpi/ec.asl:
https://review.coreboot.org/c/coreboot/+/35523/144/src/mainboard/acer/aspire... PS144, Line 177: SMI
Does your smihandler handle those?
I suspect that some use of SMM here could be DTS ("digital thermal sensor?"). It's an alternative to EC ACPI for thermals. But not necessarily these traps.
Speaking of, am I out of luck regarding SMM debug as coreboot's SMM doesn't log to CBMEM?