Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40835 )
Change subject: nb/intel: Fix 16-bit read/write PCI_COMMAND register ......................................................................
Patch Set 6: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/40835/6/src/northbridge/intel/gm45/... File src/northbridge/intel/gm45/iommu.c:
https://review.coreboot.org/c/coreboot/+/40835/6/src/northbridge/intel/gm45/... PS6, Line 47: u16 cmd = pci_read_config8(igd, PCI_COMMAND); : cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); : pci_write_config16(igd, PCI_COMMAND, cmd); Can be written as
pci_update_config16(igd, PCI_COMMAND, ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY), 0);