Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41852 )
Change subject: sb/intel/bd82x6x/smihandler: Fix xHCI sleep handler
......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41852/7/src/southbridge/intel/bd82x...
File src/southbridge/intel/bd82x6x/smihandler.c:
https://review.coreboot.org/c/coreboot/+/41852/7/src/southbridge/intel/bd82x...
PS7, Line 112: /* FIXME: Unbalanced width in read/write ops (16-bit read then 32-bit write) */
: reg16 = pci_read_config16(PCH_XHCI_DEV, 0x74);
: reg16 &= ~0x03UL;
: pci_write_config32(PCH_XHCI_DEV, 0x74, reg16);
This also needs to be fixed, the register is 16-bit.
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