[coreboot-gerrit] [S] Change in coreboot[main]: soc/amd/phoenix/fch: only init ACPI IO ports in FSP case

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/80297?usp=email )

(

1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: soc/amd/phoenix/fch: only init ACPI IO ports in FSP case
......................................................................

soc/amd/phoenix/fch: only init ACPI IO ports in FSP case

Since openSIL configures the APCI IO port addresses, coreboot should not
overwrite them.

Signed-off-by: Felix Held 
Change-Id: If10e5a9f52ab313ad1afebd7f9e722994d48b0a7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80297
Reviewed-by: Matt DeVillier 
Tested-by: build bot (Jenkins) 
---
M src/soc/amd/phoenix/fch.c
1 file changed, 6 insertions(+), 4 deletions(-)

Approvals:
  Matt DeVillier: Looks good to me, approved
  build bot (Jenkins): Verified

diff --git a/src/soc/amd/phoenix/fch.c b/src/soc/amd/phoenix/fch.c
index e9bc80a..1e03cda 100644
--- a/src/soc/amd/phoenix/fch.c
+++ b/src/soc/amd/phoenix/fch.c
@@ -89,10 +89,12 @@
     * ACPI tables are generated. Enable these ports indiscriminately.
     */

-	pm_write16(PM_EVT_BLK, ACPI_PM_EVT_BLK);
-	pm_write16(PM1_CNT_BLK, ACPI_PM1_CNT_BLK);
-	pm_write16(PM_TMR_BLK, ACPI_PM_TMR_BLK);
-	pm_write16(PM_GPE0_BLK, ACPI_GPE0_BLK);
+	if (CONFIG(PLATFORM_USES_FSP2_0)) {
+		pm_write16(PM_EVT_BLK, ACPI_PM_EVT_BLK);
+		pm_write16(PM1_CNT_BLK, ACPI_PM1_CNT_BLK);
+		pm_write16(PM_TMR_BLK, ACPI_PM_TMR_BLK);
+		pm_write16(PM_GPE0_BLK, ACPI_GPE0_BLK);
+	}

if (CONFIG(HAVE_SMI_HANDLER)) {
    	/* APMC - SMI Command Port */