Felix Held submitted this change.
1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
soc/amd/phoenix/fch: only init ACPI IO ports in FSP case
Since openSIL configures the APCI IO port addresses, coreboot should not
overwrite them.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: If10e5a9f52ab313ad1afebd7f9e722994d48b0a7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80297
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/soc/amd/phoenix/fch.c
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/soc/amd/phoenix/fch.c b/src/soc/amd/phoenix/fch.c
index e9bc80a..1e03cda 100644
--- a/src/soc/amd/phoenix/fch.c
+++ b/src/soc/amd/phoenix/fch.c
@@ -89,10 +89,12 @@
* ACPI tables are generated. Enable these ports indiscriminately.
*/
- pm_write16(PM_EVT_BLK, ACPI_PM_EVT_BLK);
- pm_write16(PM1_CNT_BLK, ACPI_PM1_CNT_BLK);
- pm_write16(PM_TMR_BLK, ACPI_PM_TMR_BLK);
- pm_write16(PM_GPE0_BLK, ACPI_GPE0_BLK);
+ if (CONFIG(PLATFORM_USES_FSP2_0)) {
+ pm_write16(PM_EVT_BLK, ACPI_PM_EVT_BLK);
+ pm_write16(PM1_CNT_BLK, ACPI_PM1_CNT_BLK);
+ pm_write16(PM_TMR_BLK, ACPI_PM_TMR_BLK);
+ pm_write16(PM_GPE0_BLK, ACPI_GPE0_BLK);
+ }
if (CONFIG(HAVE_SMI_HANDLER)) {
/* APMC - SMI Command Port */
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