[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: update memory cfg for Tiger Lake

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40061 )

Change subject: soc/intel/tigerlake: update memory cfg for Tiger Lake
......................................................................

Patch Set 3: Code-Review+1

(5 comments)

https://review.coreboot.org/c/coreboot/+/40061/3//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/40061/3//COMMIT_MSG@7 
PS3, Line 7: update memory cfg for Tiger Lake
This is a very generic title. Maybe: "Replace Reserved9 usage with DisableDimmCh# in init_spd_upds()"

https://review.coreboot.org/c/coreboot/+/40061/3//COMMIT_MSG@9 
PS3, Line 9: Update mem cfg
This change updates memory configuration

https://review.coreboot.org/c/coreboot/+/40061/3//COMMIT_MSG@9 
PS3, Line 9: .
It would be good to provide reference to the CL that updated the headers to introduce DisableDimmCh# instead of the Reserved field.

https://review.coreboot.org/c/coreboot/+/40061/3//COMMIT_MSG@11 
PS3, Line 11: 150357377
b:

https://review.coreboot.org/c/coreboot/+/40061/3//COMMIT_MSG@13 
PS3, Line 13: build volteer and boot to kernel
Did you try disabling DIMMs by setting different configurations?