[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/skylake: Set FSP options for PEG port

[Maxim Polyakov (Code Review)]

Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32045 )

Change subject: soc/intel/skylake: Set FSP options for PEG port
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Patch Set 10:

(1 comment)

https://review.coreboot.org/#/c/32045/9/src/soc/intel/skylake/chip.h 
File src/soc/intel/skylake/chip.h:

https://review.coreboot.org/#/c/32045/9/src/soc/intel/skylake/chip.h@235 
PS9, Line 235: 	} Peg2MaxLinkWidth;
> Maybe I'm looking at the wrong header file, but I see the same mapping […]

Sorry.
Add x2. Fixed