Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41248 )
Change subject: soc/amd/common/block/spi: Add support for common SPI configuration
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Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41248/5/src/soc/amd/common/block/sp...
File src/soc/amd/common/block/spi/fch_spi.c:
https://review.coreboot.org/c/coreboot/+/41248/5/src/soc/amd/common/block/sp...
PS5, Line 21: lpc_initialize_spi_bar(SPI_BASE_ADDRESS, SPI_ROM_ENABLE);
Looks like we need to do the split here?
Yeah, I put the split into the next CL. Need to fix that.
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Gerrit-Project: coreboot
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